3. Main technologies (speed, cost effectiveness)
Many examples of LNA made with different technology processes are reported in literature. LNAs are reported using PHEMT1 or SiGe HBT technologies2, that allow very high frequency range, in the order of 5 GHz or more with a good behavior.
What we would realize is a low-cost high-scale device operating in the range around 2 GHz that could be manufactured for commercial purposes. While GaAs and other heterojunction LNAs represent the state of the art and BJT offer very high performance, as the minimum feature size of CMOS device decreases we can expect better and better performance from this technology. In particular a very small channel length means higher fT and very low NF comparable to those of the
other more costly technologies. Actually a very important benefit of CMOS is its cost effectiveness and its higher level of integration due to its very large scale production. For this reason in the last years a great effort has been done in researching about CMOS RF integrated circuits. We will use a standard CMOS process with ensures very low production costs. There are some RF-optimized CMOS processes which allow the fabrication of integrated inductors and capacitors with higher merit figures (Q). They require some additional masks compared with the standard CMOS used in digital circuits. These are intended to minimize the oxide thickness of the capacitors and the parasitic resistance of the inductor. Nevertheless we will use integrated reactive components as well.
1 J. Sadowy, I. Telliez et al., “Low noise, high linearity, wide bandwidth Amplifier using a 0.35µm SiGe BiCMOS for
WLAN applications” IEEE Radio Frequency Integrated Circuits Symposium, pp. 217-220, 2002
2
S. Kumar, M.Vice et al., “Enhancement mode PHEMT Low Noise Amplifier with LNA Linearity Control (IP3) and Mitigated Bypass Switch” IEEE Radio Frequency Integrated Circuits Symposium, pp. 213-216, 2002