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CHAPTER 8: CPU and Memory

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CHAPTER 8: CPU and Memory

Design, Enhancement, and Implementation

The Architecture of Computer Hardware, Systems Software & Networking:

An Information Technology Approach 4th Edition, Irv Englander

John Wiley and Sons 2010

PowerPoint slides authored by Wilson Wong, Bentley University

PowerPoint slides for the 3

rd

edition were co-authored with Lynne Senne,

Bentley College

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Cache Memory

 Blocks: 8 or 16 bytes

 Tags: pointer to location in main memory

 Cache controller

 hardware that checks tags

 Cache Line

 Unit of transfer between storage and cache memory

 Hit Ratio: ratio of hits out of total requests

 Synchronizing cache and memory

 Write through

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Step-by-Step Use of Cache

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Step-by-Step Use of Cache

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Performance Advantages

 Hit ratios of 90% common

 50%+ improved execution speed

 Locality of reference is why caching works

 Most memory references confined to small region of memory at any given time

 Well-written program in small loop, procedure or function

 Data likely in array

 Variables stored together

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Two-level Caches

 Why do the sizes of the caches have to be

different?

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