• Non ci sono risultati.

Table of contents

N/A
N/A
Info
Scarica
Protected

Academic year: 2021

Condividi "Table of contents"

Copied!
3
0
0

Caricamento.... (Visualizza il testo completo ora)

Scarica adesso ( 3 pagine )

Testo completo

(1)

Table of contents

1. Introduction

1.1. Typical RF receiver (superheterodyne and direct conversion) 1.2. What is an LNA?

2. Important aspects 2.1. Noise

2.1.1. Noise types

2.1.2. Noise parameters and noise model 2.2. Linearity

2.2.1. Harmonics

2.2.2. Gain compression 2.2.3. Intermodulation

2.2.4. Linearity of cascaded stages 2.2.5. Linearity in an LNA

2.3. Power 2.4. Gain (VGA)

2.5. Frequency band (Multiband LNA, GSM, UMTS, BT) 2.6. Input adaptation

2.6.1. Z-parameters, S-parameters 2.7. Stability

2.7.1. K-Parameter, considerations

3. Main technologies (speed, cost effectiveness)

4. Different MOS topologies 4.1. Stability

4.1.1. Cascode (unilateralization) 4.1.2. Neutralization techniques 4.2. Input Matching

4.3. Noise optimization

4.4. Theoretical considerations for MOSFETs 4.4.1. NF, NFmin, Gamma opt

(2)

4.5. Single ended and differential

5. Proposed circuits and simulation results 5.1. Specifications

5.2. Simulation environment

5.3. Effect of the pads and bond wires on the input impedance 5.3.1. Modeling of pads and wires

5.3.2. Simplified circuit of the input pads 5.4. External LC adapting network

5.5. Cascode with LC load

5.6. Cascode with source inductive degeneration 5.6.1. Schematic

5.6.2. Analytic calculation of Zin 5.6.3. Analytic calculation of the gain 5.6.4. Estimation of the noise figure 5.6.5. Consideration about linearity 5.6.6. Stability

5.6.7. Simulation results

5.7. Cascode with feedback resistance 5.7.1. Schematic

5.7.2. Analytic calculation of Zin 5.7.3. Analytic calculation of the gain 5.7.4. Noise figure

5.7.5. Considerations about linearity 5.8. Possible solutions to obtain two gain steps

5.8.1. Crossed Cascode

5.8.2. Variable current generator 5.8.3. Capacitive divider

5.9. Multifrequency amplifier

5.10. Integrated inductor (model with parasitics, area, tolerance) 5.11. General Scheme

5.12. Final circuit schematic 5.13. Control logic

(3)

6. Layout, LVS, post- layout simulations 6.1. Layout description 6.2. Post-layout simulations 7. Conclusions 8. References Appendix A.

A.1 Calculation of Zin for the Cascode with source degeneration inductor

A.2 Calculation of Zin for the Cascode with feedback resistor

Appendix B.

B.1. Schematic simulation results B.1.1. Mode 00 : 1.8 GHz HG B.1.2. Mode 01 : 1.9 GHz HG B.1.3. Mode 10 : 2.1 GHz HG B.1.4. Mode 11 : 2.1 GHz LG B.2. Post-layout simulation results B.2.1. Mode 00 : 1.8 GHz HG B.2.2. Mode 01 : 1.9 GHz HG B.2.3. Mode 10 : 2.1 GHz HG B.2.4. Mode 11 : 2.1 GHz LG

Riferimenti

Scarica adesso ( PDF - 3 pagine - 9.11 KB )

Documenti correlati

File PDFOspedalizzazione: confronto tra popolazione italiana e immigrata nelle coorti della rete italiana degli studi longitudinali metropolitani

GENITOURINARIO GRAVIDANZA E PARTO MALATTIE DELLA PELLE MALATTIE DEL SISTEMA OSTEOMUSCOLARE MALFORMAZIONI CONGENITE 11% 6% 2% 2% 5% 2% 1% 1% 4% 2% 6% 3% 5% 3% 4% 4% 8% 6% 9% 7% 20%

Logic circuits from zero forcing

In relation to the circuit for the function ðx 1 AND x 2 Þ OR ðx 3 AND x 4 Þ, it may be interesting to see that if there are two parties each one choosing the input of one of the

22- CURRENT LOOP CONFIGS

Figure 1 below shows how to create a 4-20 mA current loop circuit for a controller without a dedicated power supply or an input for a 4-20 mA signal.. A 24 VAC transformer

Histoplasmosis in a lung transplant recipient from a nonendemic area

Elda Righi, 1 Manuela Lugano, 2 Maha Assi, 3 Assunta Sartor, 4 Elena De Carolis , 5 Massimo Crapis, 1 Barbara Cadeo, 1 Antonietta Vella, 5 Maurizio Sanguinetti, 5 Claudio Scarparo,

1° 2° 3° 4° 5°

NELLA TERZA FINESTRA TROVERAI UN MAGNIFICO UNICORNO BIANCO?. 1° 2° 3°

ALBO DEGLI AMMINISTRATORI DI SOSTEGNO

TERRITORIO CIRCOSCRIOZIONE Disponibilità territoriale.. cod. area competenze:

Extremely high gate turn-on voltage of GaAs double camel-like gate field-effect transistor

GaAs-based field-effect transistors (FETs), such as metal-semiconductor FETs (MESFETs) [1, 2], doped- channel FETs (DCFETs) [3, 4], and modulation-doped FETs (MODFETs) [5, 6],

SOMMARIO Contents P. 06 PERCORSO BENESSERE WELLNESS PATH P. 07 TRATTAMENTI VISO FACE TREATMENTS P. 09 TRATTAMENTI CORPO BODY TREATMENTS

2 hydrating peelings, 4 lymphatic drainage wraps, 1 detoxifying face treatment, 1 nutri face treatments, 2 anti – aging face treatments, 1 eye contour treatment, 3 relaxing massages,