82
Riferimenti bibliografici
[1] P. Bruschi, “Microelettronica Analogica,” SEU.
[2] B. Razavi, “Design of Analog CMOS Integreted Circuits,” McGraw-Hill.
[3] K.N. Leung, P.K.Y.Mok, “A sub-1 V 15 ppm/oC CMOS Bandgap Reference without requiring Low Threshold Voltage Device ,” IEEE JSSC, vol. 37, pp. 526-530, April 2002. [4] S. Miller, L. MacEachern, “A Nanowatt Bangap Voltage Reference For Ultra-Low Power Applications,” IEEE, 2006.
[5] K.N. Leung, Philip K. T. Mok, “A CMOS Voltage Reference Based on Weighted ΔVGS for
CMOS Low-Dropout Linear Regulators,” IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 38, NO. 1, JANUARY 2003.
[6] G. De Vita, G. Iannaccone, “A Sub-1 V, 10 ppm/ oC, Nanopower Voltage Reference Generator”.
[7] G. De Vita, G. Iannaccone, P. Andreani, “A 300 nW, 12 ppm/ oC Voltage Reference in a Digital 0.35 μm CMOS Process,” 2006 Symposium on VLSI Circuits Digest Technical Papers.
[8] G. Di Naro, G. Lombardo, C. Paolino, G. Lullo, “A LOW-POWER FULLY MOSFET VOLTAGE REFERENCE GENERATOR FOR 90 NM CMOS TECHNOLOGY,” IEEE, 2006. [9] CMOS 090_GP Design Rules Manual.
[10] BSIM3V3 Manual Copyright © 1999 UC Berkeley.
[11] G. De Vita, G. Iannaccone, “Ultra Low-Power Series Voltage Regulator for Passive Microwave RFID Transponders”.
[12] Jerry C. Hamann, “Using Monte Carlo Simulations to Introduce Tolerance Design to Undergraduates ,” IEEE TRANSACTIONS ON EDUCATION, VOL. 42, NO. 1, FEBRUARY 1999.
[13] H. Banba et al., “A CMOS Bandgap Reference Circuit with Sub-1V Operation,” IEEE JSSC, vol. 34, pp. 670-674, May 1999.
