Performance Analysis of Transimpedance Amplifiers
in Various Technologies
Zbigniew M. Nosal
11
Warsaw University of Technology, Institute of Electronic Systems, Nowowiejska 15/19, 00-665 Warsaw, Poland, ph. (48) 22 6607663, e-mail z.nosal@ise.pw.edu.pl Abstract — The paper deals with transimpedance
amplifiers (TIA) for optical telecommunication systems in the 10 to 43 Gb/s speed range. The limits of performance in HBT, pHEMT and CMOS technologies are investigated. Detailed noise analysis of the photodiode-TIA cluster is carried out and the factors limiting TIA sensitivity are determined. It is shown that with existent technologies the GaAs pHEMT provides lowest TIA noise.
I. INTRODUCTION
Transimpedance amplifier (TIA), as a first element fol-lowing the photodiode (Fig. 1a), is the most critical ele-ment on the receiving side of an optical link. Both noise performance and time domain response have to be consi-dered when the sensitivity of an optical receiver is opti-mized.
TIA Limiting amplifier + Iin V o Transimpedance ZT Input impedance Zin Equivalent noise bandwidth B RS LB CPD IS a) b) IS = R⋅Pop – signal current LB – bonding wire inductance CPD , RS – junction capacitance
and series resistance
Fig. 1. a) structure of a typical optical receiver, b) small signal model of the photodiode used in this paper.
All available technologies are used currently in the TIA design [1-4] and the performance achieved qualifies these circuits for both 10 Gb/s and 40 – 43 Gb/s systems. Two major TIA configurations predominantly used are shown in Fig. 2. RF RC VCC in VDD VSS in
a)
b)
Classic feedback (also in FET technology)
Common gate (or common base)
RD
Fig. 2. Typical transimpedance amplifier configurations: a) based on resistive feedback, b) using inherently low impedance input stage (called straight TIA in the text)
This paper attempts to analyze the characteristics of the two configurations in a more general way and to provide
measures to determine achievable gain and noise perfor-mance. Many simplifications were conscientiously used to keep the resulting equations manageable.
Following major assumptions were made: a) voltage follower stage has unity voltage gain and low output impedance (which may not be true in the 40 GHz frequency range); b) noise contribution comes from the first stage and it’s load only.
In the first part of the paper the gain and frequency res-ponse are considered and the limits on gain for a given bandwidth are derived.
In the second part, general (although simplified) equa-tions for the equivalent input noise current are presented and used to compare both the two configurations and the available technologies.
II. GAIN ANALYSIS
Gain analysis of the TIA is based on an equivalent small signal model shown in Fig. 2. The amplifier itself is considered unilateral and its output impedance is neglected. Input impedance Zin is generally high in case
of feedback TIA and low in the straight TIA. The mo-del applies to both configurations – for a straight TIA the resistance of RF is infinite.
CPD RS LB IS D ens⋅jωCPD D inf RF ena ina Vin Zin Vin⋅ Av (jω) Noiseless amplifier Vo Vno ZS
Fig. 2. Equivalent small signal and noise model of a transimpedance amplifier
PD S PD SC L C R j D=1+ ω −ω2 df G T i df R T ens2 =4k ⋅ S⋅ nf2 =4k ⋅ F⋅
ena , ina and the correlation admittance
2 * na na na cor e e i
Y = ⋅ are the noise
parame-ters of an amplifier (see Appendix).
General expression for circuit transimpedance (Fig. 2) is
(
v F in)
PD F F v S o T R C j Y R A D R A I V Z ω + + − ⋅ ⋅ = = 1 (1)Noise current density referenced to input (IS source
termi-nals) inin = Vno / ZT is computed as
nS PD S F F na na nf nin R Y C e R e i i D i + ⋅ + ⋅ + + ⋅ = (1 ) jω (2)
In case of no-feedback configuration – like common base input stage – general expressions for ZT and inin are
PD in v T C j Y D A Z ω + ⋅ = (3)
(
na nS)
PD na nin D i e e C i = ⋅ + + ⋅jω (4) RB Gin Cπ Cµ RD Cµ gm⋅Vin Vin V1 1⋅V1 Gin Cπ RD Cµ Cµ gm⋅V Vin V1 1⋅V1common base/gate stage voltage follower
ri
V
common emitter/source stage voltage follower
a)
b)
Fig. 3. Simplified small signal equivalent circuit of an amplifier for a straight (a) and feedback (b) configuration. RB is a bias
resis-tor for the input transisresis-tor. Relatively small Gin in b) may be
neg-lected at higher frequencies.
The two cases will be dealt with separately. For the straight (no-feedback) circuit the voltage gain may be ap-proximated to the first order as
µ ω ωτ ω C R j R g j A j A D D m a o v 2 1 1 ) ( ⋅ + = + = (5) where Cµ = Cbc or Cgd .
Substituting (5) into (3) the expression for ZT may be
derived in case of LB = 0. This will allow evaluating
inhe-rent limitations for this configuration. ZT is given by
+ + + − ⋅ + = D T in PD T D a D T G C R j Z τ ω ω ωτ ω τ ω ω 1 j 1 1 j 1 ) ( 2 (6)
where the time constants are: τa = 2RDCµ and τD = RSCPD ,
and Gin = gm , ωT≈gm /(Cπ + Cµ ). This equation sets the
limit on the transimpedance ZT (0) = RD given the
photo-diode and transistor parameters. For a given bandwidth B an upper limit for the allowable time constant τa may be
found and hence the RD value for a certain transistor size
and technology.
Next, the gain limits will be derived for three illustrative sets of transistor and photodiode parameters for 10 Gb/s and 40 Gb/s transmission:
A) fT = 50 GHz, B = 10 GHz, CPD = 0.2 pF, RS = 30 Ω.
B) fT = 100 GHz, B = 10 GHz, CPD = 0.2 pF, RS = 30 Ω.
C) fT = 160 GHz, B = 40 GHz, CPD = 50 fF, RS = 20 Ω.
Transistor fT may easily be achieved with existing bipolar,
HEMT or CMOS technologies and case A may be rep-resentative for a 0.25 µm CMOS, case B for a 0.13 µm CMOS and case C for a 90 nm CMOS [9].
When LB is included into the circuit, the transimpedance
is given by the fourth order equation:
(
)
(
)
T PD B PD B T a a T in PD D a D T C L d C L c G C b C R a d c b a R j Z ω ωτ τ ω τ ω ω ω ω ω µ = + = + + = = = − − + ⋅ + = 1 2 where j j 1 j 1 ) ( 3 2 (7)Equation (6) has been solved for the three cases considered for a range of transistor gm values. Assumption
was made that transistor dimensions are kept constant and gm is changed by appropriate adjustment of transistor
current. Cµ was taken as 15 fF for cases A and B, and 10 fF for case C. Resulting RD values are plotted in Fig. 4 with
solid lines. Eq. (7) was used next to find numerically maxi-mum RD and suitable inductance LB to achieve required
bandwidth B. Additional constraint was imposed on the fre-quency response to be monotonic, without any significant peaks. This requirement is needed to assure adequate res-ponse in time domain and sufficiently clean eye diagram plot. The results are shown in Fig. 4 with dashed lines.
Transimpedance vs. gm 0 100 200 300 400 500 600 700 800 900 0 25 50 75 100 125 150 gm (mS) ZT ( O h m ) A B C A_LB B_LB C_LB B = 10 GHz 40 GHz
Fig. 4. Transimpedance vs. first transistor gm for the three cases
considered. Solid lines – circuit without LB , dashed lines – for
inductive compensation.
Similar considerations were carried out for a feedback TIA. Relevant equations are given below.
For LB = 0 + − + + + − ≈ m PD D F D m F PD F D F T g C C R R g R C C R R Z 2 j 1 ω τ µ ω2 µ τ For LB≠ 0 c j b a j R ZT F 3 2 1+ ω −ω − ω − = (8)
where µ µ µ τ τ C R C L c g C C R C L b R g R C C R a F PD B m PD D F PD B F m F PD F D = + + = + + = 2
It is interesting to note that to the first order the response does not depend on transistor fT assuming that Cµ is
con-sistent with required bandwidth. The major pole is formed by the feedback resistor RF and the photodiode capacitance.
Analysis similar to the presented above has been perfor-med and the results are presented in Fig. 5 for B = 10 GHz and in Fig. 6 for the bandwidth B = 40 GHz. It was assu-med that the load resistance RD needed might be achieved
with appropriate circuitry (passive or active).
Transimpedance vs. gm - BW = 10 GHz 0 200 400 600 800 1000 1200 1400 0 25 50 75 100 125 150 gm (mS) ZT (Ohm ) A_10 A_20 A_30 ALB_10 ALB_20 ALB_30
Fig. 5. Transimpedance vs. transistor gm for the three cases and B
= 10 GHz. Solid lines – circuit without LB , dotted lines – for
inductive compensation. Results for the voltage gain gmRD = 10 ,
20 and 30 are shown.
Transimpedance vs. gm - BW = 40 GHz 0 100 200 300 400 500 600 700 800 0 25 50 75 100 125 150 gm (mS) ZT ( O hm) C_10 C_20 C_30 CLB_10 CLB_20 CLB_30
Fig. 6. Transimpedance vs. first transistor gm for the three cases
and B = 40 GHz. Solid lines – circuit without LB , dashed lines –
for inductive compensation.
It may be noticed that the feedback circuit provides ap-proximately 2 times more gain than the straight TIA under comparable conditions. LB inductor in general allows
incre-asing the gain at a given bandwidth, although the compen-sation is feasible over a relatively narrow range of gm
valu-es. Particularly in a straight configuration, the low input im-pedance (at high gm ) causes peaking in the frequency
res-ponse and corresponding distortion of the eye diagram (see Fig. 7).
a) gm = 20 mS, RD = 550 Ω b) gm = 150 mS, RD = 880 Ω
Fig. 7. Eye diagram plots: a) for B = 10 GHz and monotonic response, b) for circuit with too low input impedance and B = 13.8 GHz. 10 Gb/s NZR signal.
III. NOISE ANALYSIS
General expressions for the input current noise density are given by (2) and (4). Noise sources ena and ina include
contributions from the first transistor, its load and possib-ly from the bias resistor RB (Fig. 8).
RD inL inT inB enT RB Tran-sistor [ Y ]
Fig. 8. Noise sources in the amplifier stage. enT and InT
charac-terize first transistor
The noise sources ena and ina are given by
21 11 21 k 4 1 k 4 y y R Tdf i i i y R Tdf e e D nT nB na D nT na= + = + + (9)
Simple expressions were adopted for transistor noise des-cription [2, 3, 5]:
For a bipolar transistor:
df I I i df r T enT b nT C B + = ⋅ ⋅ = ) j ( q 2 k 4 ω β (10a)
For a CMOS transistor:
m G nT m G nT g df C T i df g r T e 2 ) ( k 4 k 4 = Γ⋅ ω Γ + ⋅ = (10b)
For a HEMT transistor:
m G n D nT C G m n D nT g df C C I i df R R T g C I e 2 ) ( q 2 ) ( k 4 q 2 ω ⋅ ⋅ = + + ⋅ ⋅ = (10c)
where: CG is the total gate to channel capacitance, RG is gate resistance, RC is a part of a channel resistance under the gate and Cn is the fitting coefficient [5].
Appropriate correlations were taken into account. Input noise current density is given below.
For a non-feedback amplifier:
− ⋅ ⋅ + + + + = PD na na nS na PD na nin C e i D e e C i D i ω ω j Re 2 * 2 2 2 2 2 2 2 (11)
For amplifier with feedback: − ⋅ ⋅ + + + + = PD na na nS na PD na nf nin C e i D e e C i i D i ω ω j Re 2 * 2 2 2 2 2 2 2 2 (12)
Equations (11) and (12) show the significance of the photodiode capacitance – it is important to use the diode with the lowest possible CPD in high sensitivity systems.
Selected results of analysis are shown in Fig. 9 and 10. Only feedback TIA is presented here as the straight configuration has higher noise, because: transistor input voltage noise is somewhat higher, gain (and hence RD is
lower and additional contribution from input RB.
Input noise current density - pHEMT-RF = 700Ω
0 2 4 6 8 10 12 14 16 0 2 4 6 8 10 f (GHz) Inin (p A/Hz) Tr_only Tr+RF All T_RS=0 A B C D
Fig. 9. Components of the total input referred noise current: A – contribution from transistor only, B – transistor and feed-back resistor, C – all components, D – noise from photodiode
RS excluded
Input noise current density - RF = 700 Ω, LB = 1nH
0 2 4 6 8 10 12 14 16 18 0 2 4 6 8 10 f (GHz) Inin (p A/Hz) pHEMT HBT CMOS pH_noLB HB_noLB CMO_noLB CMOS pHEMT
Fig. 10. Input noise current density for a pHEMT, SiGe HBT and CMOS feedback amplifiers. Solid lines: no LB correction,
dotted lines: with LB = 1 nH. In each case: fT = 100 GHz, gm =
25 mS, RF = 700 Ω
In Fig. 10, three technologies were compared for a par-ticular case of a 10 GHz feedback circuit. Representative transistor parameters were taken from publications [4, 6, 8] and all other factors were kept equal. As may be ex-pected the lowest noise is achieved with the pHEMT de-vices. Results for 40 GHz TIAs are similar in nature.
When the noise properties are considered under supply power restrictions, the lowest noise at a given bias cur-rent is achieved with SiGe and InP bipolar devices,
beca-use of their high gm.
IV. CONCLUSIONS
Of the two major configurations of transimpedance amplifiers the feedback TIA (Fig. 2a) provides higher gain at given bandwidth and with the same transistors used. In terms of transimpedance gain, the existing tech-nologies (CMOS, HEMT and bipolar) have comparable capabilities. In terms of sensitivity, (equivalent input noise current) HEMT transistors give best results.
APPENDIX
Two-port noise figure F vs. source impedance YS may be
expressed as
(
)
df G T Y e i Y F S S n n S ⋅ ⋅ ⋅ − + = 0 2 k 4 1 ) ( (A.1)introducing correlation admittance and equivalent noise resistance RN and conductance GN
df R kT e df G T i e e i B G Y N n N n n n n cor cor cor 0 2 0 2 2 * 4 k 4 j = = = + = (A.2)
the two-port noise parameters are given by (A.3)
) ( 2 1 2 2 cor sopt N opt cor N N sopt cor sopt G G R F B R G G B B − + = − = = (A.3) REFERENCES
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