Università di Pisa
Dipartimento di Ingegneria dell'Informazione
Informatica, Elettronica e Telecomunicazioni
Corso di studi in
Ingegneria Elettronica
Tesi di Laurea Magistrale
Modeling of transistors based on lateral
heterostructures of 2D materials
Candidate:
Augusto Mariani
Supervisors:
Giuseppe Iannaccone
Gianluca Fiori
4
Abstract
In a fast-pacing world such that of semiconductors, more and more resources are devoted to the development of new technologies and materials that could push the scaling of devices even further. In this context Transition Metal Dichalcogenides, TMD, gained much attention in the last few years. TMDs represent a class of materials that can be made atomically thin, like graphene, but differently from the latter they show a bandgap suitable for application in analog and digital electronics.
In this thesis a procedure to model and simulate a device based on a lateral heterostructure formed by two TMDs, NbS2 for the contact
and WSe2 for the channel, is discussed alongside the results
obtained.
The procedure described starts from the extraction of the effective mass from the band structure obtained through Density Functional Theory (DFT) calculations. Since the effective mass is not usually defined for a metal such as NbS2 a different approach
is used to obtain this parameter.
Then, this parameter is used inside the simulator NanoTCAD ViDES, a code developed internally at the University of Pisa which self-consistently solves the Poisson-Schrödinger equations in the Non-Equilibrium Green’s Function formalism.
5
Using ViDES it is possible to describe the whole device structure which is not feasible by means of DFT packages due to long computational time. A double gate transistor is thus modeled.
In the following work, the results obtained are presented and commented. A comparison is also carried between our device and the roadmap proposed by the International Roadmap for Devices and Systems showing that the proposed device indeed has interesting characteristics, especially suited for low power applications, although it is not competitive with future generations from IRDS. Hence the procedure developed can be applied to different pairs of materials, in order to compare their performance and decide which one is more promising.
6
Index
Abstract ... 4 Index ... 6 Chapter 1 Introduction ... 10 1.1 2-D material properties ... 15 1.2 Graphene ... 16 1.3 TMD materials ... 181.4 Electron devices based on TMDs ... 20
1.5 Optoelectronic devices ... 27
1.6 Flexible Electronics ... 28
1.7 Manufacturing and present challenges ... 29
1.8 State of the art ... 33
Bibliography ... 34
Chapter 2 Device modeling ... 40
2.1 Tight binding model ... 40
2.2 Case study: graphene tight-binding Hamiltonian ... 50
7
2.4 Expressions for the current ... 63
2.5 Non-degenerate conditions current ... 66
2.6 2-D MOSFET electrostatics ... 67
Bibliography ... 73
Chapter 3 The Hamiltonian matrix & the simulation code ... 74
3.1 The Tight-binding Hamiltonian ... 74
3.2 The simulation code ... 82
3.3 The Schrödinger equation and NEGF ... 84
3.4 The Hamiltonian ... 90
3.5 Velocity distribution of carriers ... 93
Bibliography ... 96
Chapter 4 Simulation results ... 97
4.1 The device ... 98
4.2 Band structure at the metal/channel interface ... 104
4.3 Physical quantities for the simulation ... 106
4.4 Simulation challenges ... 114
4.5 The simulated device ... 118
4.6 The non-zero gap and ambipolar behavior ... 121
4.7 Current-voltage characteristics ... 124
4.8 The Local Density Of States plot ... 130
4.9 Performance evaluation ... 134
8
Introduction
10
Chapter 1
Introduction
In the last decade the continuous scaling of transistor led to a situation where reducing the size of planar components was no longer sufficient to reduce the cost per function, and Semiconductor Industry moved from planar to 3D geometry, such as the FinFET structure, although increasing challenges in the construction of ever taller transistors will move research to other structure, such as Gate All Around FET, to improve gate electrostatics, or stacked structures such as Nanosheet transistor proposed by IBM and Samsung.
Figure 1.1: Depiction of the structure of finFET to Nanosheet Fet. From Qualcomm-Synopsys
Introduction
11
The main issues with planar devices scaling are due to the so-called Short Channel Effects (SCEs), that became noticeable below the 60 nm technology node.
SCE include the Drain Induced Barrier Lowering, DIBL, an effect that is caused by the poor electrical screening provided by the channel, which results in an interference from the Drain contact to the potential across the device, yielding to unpredictable changes in the Threshold Voltage VT.
DIBL is defined as:
DIBL=∆𝑉( ∆𝑉)*
Figure 1.2: Depiction of the DIBL effect on the Threshold Voltage, from [51]
Below it is shown the characteristic Channel Scaling Length equation. This equation is valid to describe the scaling of planar devices and is a result of the examination of FET electrostatics through Poisson’s equation. Below the expression of the Channel Scaling Length is presented.
Introduction
12 𝜆 = -𝑡/0𝑡*
𝜀* 𝜀/0
Where 𝑡/0 is the oxide thickness, 𝑡* is the semiconductor body thickness and
𝜀* and 𝜀/0 are the dielectric constants of the semiconductor and the oxide,
respectively.
The determination of 𝜆 is based on the fact that it is assumed that the variation of the potential across the device due to each contact is of the order of 𝜆. As a consequence, the channel must be longer multiple 𝜆 so that the effect of the gate electrode is not influenced by the electrostatics from the contacts.
The Channel Scaling Length is used as a first approximation since it sets the lower limit to channel scaling in order to avoid SCE, so the smaller the 𝜆 the shorter can be the channel.
The other effect due to the Short Channel is the direct tunneling between Source and Drain contacts, which determinates the ultimate channel scaling limit.
In order to counter the Drain Induced Barrier Lowering, as can be seen from the above relationship, one solution is to produce thinner channel devices, so thin body silicon structures were developed, consisting of a thin layer of Silicon as the channel.
Introduction
13
Figure 1.3: (a) dangling bonds in thin body devices (b) lateral view of thin body device with potential along the x-axis, from [3]
The main problem with this kind of solution was the degradation of carrier mobility in Silicon as a result of the thin body. In thin layers the mobility of carriers in silicon is strongly reduced as a consequence of collision with dangling bonds, and surface roughness, as discussed in [3].
Introduction
14
Figure 1.4: Reduction of the effective mobility at the thinning of the transistor's body. Figure from [50]
While the DIBL issue can theoretically be solved for example as discussed above, although at the price of mobility, the direct tunneling cannot be solved without employing longer channel.
Towards the end of further scaling, researchers have been looking for alternative materials to sustain device scaling, as an example with high-k materials for gate dielectric or the introduction of Germanium to increase carrier mobility through mechanical stress induced on the channel.
Amongst new candidate materials, 2-D materials emerged as a viable substitute to Silicon, of those, Transition Metal Dichalcogenides, TMD, and MoS2 in particular, were particularly studied due to their unique properties.
Introduction
15
1.1 2-D material properties
A first benefit common to 2-D materials is the fact that, theoretically, through Eq.(1) we can estimate the channel scaling length to be around 7 nm, given a proper oxide thickness, thus potentially enabling the further scaling of planar devices.
In general, 2-D materials have strong in-plane covalent bonds, but weak van der Waals interaction keeps the stacked layers together, thus enabling material extraction via exfoliation.
In addition to that, as discussed in [1], 2-D materials are expected to have low interfacial defects unlike 3-D ones, and can be used to create layered structures of different materials, thus enabling the formation of vertical and lateral heterostructures where the single components have completely different physical characteristics, such as bandgap or lattice constant, while that is not possible with common bulk heterostructures, that require at least lattice matching between materials [39].
TMDs such as MoS2 show interesting mechanical and optical properties, thus allowing employment in flexible electronics or optoelectronics applications [14].
Introduction
16
1.2 Graphene
Graphene is obtained from graphite through exfoliation and is defined as an atomically thin graphite sheet. Since its discovery, graphene has been object of many studies given its phenomenal electrical and thermal characteristics. Graphene is probably the first 2-D material studied extensively, that undoubtably paved the way for other 2-D materials as well.
The main characteristic of Graphene resides in its band-structure, reproduced below.
Figure 1.5: Band structure calculated from DFT for monolayer graphene, from [] It can be seen that the minimum of the Conduction Band and the maximum of the Valence Band touch at the so-called Dirac point, and thus Graphene is a material with zero bandgap.
Introduction
17
In addition to that, we can see how the dispersion relation is linear in proximity of the Dirac point so that the effective mass cannot be defined conventionally. Near the Dirac point electron behave as a relativistic particle with a velocity 𝑣3 called Fermi velocity given by
𝑣3 =3𝑡𝑎676 2ℏ
Where 𝑡 is the hopping parameter term, which accounts for the interaction of an electron with his surroundings, and 𝑎676 is the Carbon to Carbon distance.
A more detailed explanation of the hopping parameter term is given in Chapter 3.
This feature is the reason why Graphene has extremely high mobility, ranging from 30000 to 80000 cm<⁄ at room temperature when placed on a 𝑉𝑠
Hexagonal Boron Nitride ,hBN, substrate [1].
The doping of Graphene requires an appropriate bias to move the Fermi energy at the Dirac point above the conduction band, to obtain n type conduction, or below, in the valence band, for p type conduction. This characteristic compensates for the impossibility of a chemical doping process, which is common practice in other semiconductors, as a consequence of the extreme thinness of the material.
The absence of energy gap makes it difficult to exploit Graphene as a channel material for transistor , since it would mean poor On/Off current ratios. It was shown that graphene Nanoribbons result in the formation of a bandgap thus potentially enabling switching capabilities, but typically mobility is reduced in these structures due to rough edges.
Due to the above reasons, graphene is not suited for digital electronics application, but it is currently being investigated for its application in RF circuits, [13] discusses the possibility and performance of employing graphene
Introduction
18
on current Silicon manufacturing processes to achieve competitive with state-of-the-art devices performances.
Another example of RF application of Graphene-based FET is discussed in [41]
1.3 TMD materials
TMDs are chemical compounds with chemical formula MX2 where M is a
transition metal and X is a chalcogen atom (S, Se or Te) with noticeable examples being MoS2 or WSe2. One monolayer of TMD consists of a sheet of M
sandwiched between two hexagonal layers of X with primarily intra-layer covalent bonding.
Figure 1.6: Depiction of the Periodic Table with the atomic arrangement for TMD compounds
These compounds exhibit show semiconducting or metallic behavior. Other 2D materials exhibit insulating behavior, such as Hexagonal Boron Nitride (hBN).
Introduction
19
The following discussion will be mainly about the MoS2 compound, as it is one
of the most interesting materials belonging to the TMD class.
Monolayer MoS2 has a direct bandgap of 1.78 eV, while in its bulk state it is a
semiconducting material with an indirect bandgap of 1.2 eV [49].
Figure 1.7: Band structure obtained through DFT for MoS2 and WSe2 monolayers,
from [48].
Monolayer MoS2 shows interesting opportunities for optoelectronics
applications [46] as a consequence of its direct bandgap, a feature not found in multilayer or bulk MoS2.
The presence of a gap in the 1-2 eV range for a channel material in FETs is crucial for digital applications since it is needed to achieve high On/Off current ratios[1][5], because its presence allows the transistor to be properly switched on and off, while maintaining reasonably small leakage current.
In particular transistor made with MoS2 has been already demonstrated in
digital electronics circuits, such as SRAM, NAND gate, and even 5-stage ring oscillator with encouraging results, as reported in [9].
A drawback of MoS2 is the relatively low carrier mobility, that should be
theoretically 400 cm<⁄ at room temperature from Density Functional 𝑉𝑠
Introduction
20
the range 1-50 cm<⁄ [24][25] and strongly depends on factors such as the 𝑉𝑠 number of layers [7][26] and channel encapsulation. Exceptionally high mobility, 34000 cm<⁄ ,was measured on a structure composed of six-layered 𝑉𝑠
MoS2 channel encapsulated in hBN with multiple graphene contacts to reduce
contact resistance, at a temperature of 13K [32]. The structure measured is depicted below.
Figure 1.8: Analyzed structure from [32]
1.4 Electron devices based on TMDs
Given their bandgap, TMDs are suited for digital application, so they have been extensively studied for application in that context. In 2011 a single layer
Introduction
21
MoS2 channel FETs was produced and characterized by Giacometti ,Kis and others [10]. The paper discusses how a large On/Off current ratio, defined as the ratio between the maximum and minimum output current was measured. Below the structure measured is depicted.
Figure 1.9: Structure of the transistor discussed, from [10]
The paper reports On/Off current ratios beyond 10A for an applied Gate
voltage in the ±4V range and a ratio of 10Cwas achieved for an applied Drain-Source bias of 500 mV, with the same gate bias.
Introduction
22
Figure 1.10: Channel current as a function of Top Gate voltage to show the high Subthreshold Swing, from [10]
Under the same conditions it is reported a Subthreshold Swing of 74mV/decade, with 60 mV/decade being the theoretical limit for classical transistor.
The Subthreshold Swing is defined as the variation in the gate voltage that results in an increase of the current by one decade when the device operates in sub-threshold regime.
A low value of this parameter indicates that small variations in the gate bias produce a significant increase in the current. That is important because this directly affect the leakage current of the device, which contributes to the dissipated power.
Introduction 23 𝑆𝑆 = ln(10)𝑘T 𝑞 L1 + 𝐶) 𝐶/0O
Where 𝑘 is the Boltzmann’s constant, T is the temperature in Kelvin, q is the electron’s charge, 𝐶) is the depletion layer capacitance, which is due to the
charge inversion in the channel and 𝐶/0 denotes the gate capacitance. It must
be noticed that in thin body devices the depletion capacitance is substituted by the quantum capacitance of the channel.
Under ideal condition SS reduces to
𝑆𝑆 = ln(10)𝑘T
𝑞 ≃ 60 𝑚𝑉 𝑑𝑒𝑐⁄
With respect to that, it must be noticed that the limit of 60 mV/decade can be removed employing different devices such as Tunnel FET.
Other than traditional FET or TFET, vertical heterostructures made with TMDs have been demonstrated to be a viable choice for Floating Gate transistor structures. The floating gate transistor is nowadays a standard device employed for nonvolatile memories, such as Solid State Drives. The floating gate structure was first proposed by Sze in 1967 in [47], below the device’s structure is depicted as shown in the paper.
Introduction
24
The structure resembles a typical MOSFET transistor with the addition of a gate, the floating gate, embedded in the gate oxide. The floating gate is needed to accommodate charge coming from the channel below. The mechanism employed to store and release charge in the floating gate is the Fowler-Nordheim tunneling, which, given the thinness of the I(1) material from the picture can occur under proper biasing condition. Below the band diagram is shown for the structure in figure.
Figure 1.12: Band bending under programming voltage and tunneling of charge from the channel S to the floating gate M2, from [47]
As can be seen, under a positive applied bias from the gate, the band bending further reduces the barrier provided by the I(1) material, that is already 5 nm thick, thus tunneling can easily occur through it. This phase is known as the programing phase. The charge accumulated on the floating gate as a result of
Introduction
25
carrier injection from the channel determinates an higher threshold voltage for the device, so that the logic value stored can be interpreted as the presence or absence of charge in M(1). In order to empty the floating gate a bias opposite to the one used for the programming phase is employed, thus initiating the erasing phase.
It must be noticed that in the article [47] a programming voltage of 50 V is used, but that is mainly a consequence of the thickness of the I(2) oxide, which is 100 nm thick. In [20] a structure analogous to the one in Figure 1.11 was realized. Below the device analyzed in [20] is shown.
Figure 1.13: Floating gate device based on TMDs, from [20]
The device consists of a tunneling oxide, which corresponds to the I(1) material from Figure 1.11, 6 nm thick and an oxide correspondent to I(2) 30 nm thick. The structure shows the intended behavior with a program and erase voltage
Introduction
26
of +18 V and -18 V, respectively, with an interesting charge retention, as shown by the drain current measured on the device at zero gate voltage an very small Vds of 50 mV, which is fairly constant as shown in the figure below.
Figure 1.14: Data retention time for the Programmed/Erased state, from [20] It is also worth mentioning that TMD based electronics is currently being investigated in applications for environments with a high level of radiations, since they show a good radiation hardness character, as described in [21].
Introduction
27
1.5 Optoelectronic devices
Given its direct bandgap, monolayer TMDs are a viable option for optoelectronic devices.
In facts a MoS2 monolayer based photodetector [16] showed a
photoresponsivity orders of magnitude higher than previous MoS2 monolayer
attempts [36], and other multiple layer approaches [36].
Another possible field of application for TMDs is in 2D photovoltaic cells as reported in [38] the vertical heterostructure composed of MoS2 and WSe2
produced current once illuminated, thus showing possible implication in the production of photovoltaic panels.
More recently a photovoltaic cell through the connection of MoS2 with p-doped
Silicon was demonstrated, with a conversion efficiency of 5.23%[40].
It was also demonstrated in [15] that LEDs based on vertical stacking of monolayer materials are possible, in particular the proposed device was composed of Single Layer Graphene sheet, a thin layer of hBN, and a single layer of Wse2.
Introduction
28
1.6 Flexible Electronics
The planar nature and mechanical flexibility of 2D materials also makes them excellent candidate for lightweight and foldable or flexible electronic systems on common commodities such as paper, plastics and fabrics as well as for constructing driving circuits for flat-panel display applications, not to mention adoption in the biomedical field, where flexible devices could be used within sensor and less invasive diagnostic tests.
The adoption of silicon for flexible electronics application is limited by the brittle nature of the material, that can be easily shattered. In addition to that, in order to be properly used for flexible devices, Silicon needs to be thinned to a point where the carrier mobility is too low for electronic applications, and yet its brittle character strongly limit its employment for flexible applications. Meanwhile, 2-D material gained more and more interest as a suitable candidate for these applications, given their mechanical properties.
In [35] single and double layer MoS2 was measured, obtaining a Young
modulus of 270 and 200 Gpa respectively.
As an example high on/off current ratios of 10V with a mobility of 12.5 cm<⁄ 𝑉𝑠
was obtained by MoS2 transistor while being bent in [17].
An interesting application of 2-D materials is printable electronics, where inks are created from exfoliation of TMDs and Graphite, and actual devices are printed on a special kind of paper.
Recently even a ROM was printed, where Wse2 was employed as
semiconductor, and its functionality was verified [30], or printed Graphene sheets were demonstrated to be a viable Strain sensor with a Gauge Factor up to 125 [31].
Introduction
29
1.7 Manufacturing and present challenges
Currently TMDs are mainly fabricated using three methods [1][11]:
• Layer-by-layer stacking after mechanical exfoliation from bulk crystal
• Direct growth by means of Chemical Vapor Deposition • Layer-by-layer deposition of solution-processed crystal
Of the methods mentioned above the layer-by-layer stacking after mechanical exfoliation is the most widespread method to place TMDs onto substrates in order to fabricate devices [10 ][11], but none of the above seems to be suited for adoption in large scale production.
Other than that, manufacturing techniques compatible with standard semiconductor production processes are yet to be developed.
The other main issue with TMDs, that strongly degrades device capabilities, is the high contact resistance of the Schottky barrier at the contact-channel interface. This is a consequence of the difference between the work function of the metal and the electron affinity of resulting in a potential barrier at the interface. In addition to this phenomenon, typically some polarization occurs at the interface between materials due to the interaction between orbitals of different materials, forming a dipole that alters the Schottky barrier resulting from the difference between the work function and the electron affinity. To quantitatively evaluate such effects, heterostructures must be studied through Density Functional Theory (DFT). In [18] a MOSFET with a WSe2 channel
Introduction
30
DFT calculations and experimentally. The paper discusses how metals with a low work function compatible with the electronic affinity of the channel material which in the case of WSe2 is 3.5-4 eV are optimal candidates to achieve
low Schottky barrier n-type transistors. Below an image of the comparison between Work Functions of different metals is shown, as taken from [18].
Figure 1.15: Alignment of Work Functions from multiple suitable contact materials with respect to Electron Affinity of WSe2, from [18]
The devices fabricated is a back-gated MOSFET with WSe2 channel and
Indium, Titanium and Silver contacts, it is 1.2 𝜇m long and 3 𝜇m wide . A high mobility of 142 cm<⁄ paired with an extracted contact resistance of 7.5 kΩ 𝑉𝑠
was extracted at room temperature in vacuum with 10-6 mbar.
Other methods were explored to lower the contact resistance such as the use of metallic phase MoS2 in the contact and semiconducting phase MoS2 in the
channel as in [9], 50 nm thick Au contacts as in [10], where a contact resistance of 27 kΩ was measured with an applied Drain-Source voltage of 10 mV and an applied Gate voltage of 10 V. Others such as [42] employed graphene as a contact since its Fermi level can be suitably tuned via applied bias to match the MoS2 conduction band minimum to minimize Schottky barrier height. The
Introduction
31
contacts, Hexagonal Boron Nitride, hBN, as a high-k atomically thin dielectric and a back gate. The structure is depicted below.
Figure 1.16: Layered structure of a transistor based on TMD/graphene interface, from [42]
In [34] Scandium contacts were employed for a 10 nm thick exfoliated MoS2 5
um long channel and 12 nm wide embedded in 15 nm thick Al2O3 posed onto a
Silicon Oxide substrate with a back gate. The device achieved a high mobility of 700 cm<⁄ at room temperature. As in [18] the principle for the choice of 𝑉𝑠
the contact material was that of a low work function to possibly match the channel’s conduction band. Below an image of the work functions in the paper.
Introduction
32
Figure 1.17: Depiction of band alignment between MoS2 and various metal. From
[18].
Contacts represent an open issue, given their deep impact on device performance [18], with various couples of channel-contacts materials greatly affecting transport characteristics.
Introduction
33
1.8 State of the art
Below the main properties of the most studied TMDs are discussed, and the best results reported in literature are summarized in the table below, completed with a brief description where necessary.
Contact resistance Contact material Encapsulating dielectric Extracted mobility Dimensions On/Off ratio MoS2 channel [34]
Scandium
Al
2O
3As a coating
layer on top
of the channel
700 cm<⁄ 𝑉𝑠 5 𝜇m channel L NA 300 Ω 𝜇mZ WSe2 channel [45]Degenerately
p-doped
WSe
2Channel
encapsulated
in hBN
200 cm<⁄ 𝑉𝑠 Room Temp 2000 cm<⁄ 𝑉𝑠 5K NA 10[ WSe2 channel [49]Pd with NO
2as channel
dopant
(p-type)
Al
2O
3And HfO
2 250 cm<⁄ 𝑉𝑠 Room Temp 8 𝜇m channel L 10A MoS2 75 Ω (simulated) [42]Metallic
phase MoS
2HfO
2 25 cm<⁄ 𝑉𝑠 7.5 nm channel L 10\Bibliography
34
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30. Daryl McManus, Sandra Vranic, Freddie Withers, Veronica Sanchez-Romaguera, Massimo Macucci, Huafeng Yang, Roberto Sorrentino, Khaled Parvez, Seok-Kyun Son, Giuseppe Iannaccone, Kostas Kostarelos, Gianluca Fiori and Cinzia Casiraghi,’ Water-based and biocompatible 2D crystal inks for all-inkjet-printed heterostructures’, NATURE NANOTECHNOLOGY, VOL 12,April 2017
31. C. Casiraghi, M. Macucci, K. Parvez, R. Worsley, Y. Shin, F. Bronte, C. Borri, M. Paggi, and G. Fiori, “Inkjet printed 2d-crystal based strain gauges on paper,” CARBON, vol. 129, pp. 462–467, 2018
32. Cui, X. et al. Multi-terminal transport measurements of MoS2 using van der Waals heterostructure device platform. Nat. Nanotechnol. 10, 534–540 (2015).
33. Marian, D. et al. Transistor Concepts Based on Lateral Heterostructures of Metallic and Semiconducting Phases of MoS2. Phys. Rev. Appl. 8, 054047 (2017).
34. Saptarsi Das, Hong-Yan Chen, Hashish Verma Penumatchas, Joerg Appenzeller,’High performance Multilayer MoS2 transistors with Scandium contacts’, Nano Lett.2013131100-105
35. Bertolazzi, S., Brivio, J. & Kis, A. Stretching and breaking of ultrathin MoS2. ACS Nano 5, 9703–9709 (2011).
36. Yin, Z. et al. Single-layer MoS2 phototransistors. ACS Nano 6, 74–80 (2011) 37. Choi, W. et al.,’ High-detectivity multilayer MoS2 phototransistors with
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38. Furchi, M. M., Pospischil, A., Libisch, F., Burgdörfer, J. & Mueller, Y. Photovoltaic Effect in an Electrically Tunable van der Waals Heterojunction.
Nano Lett. 14, 4785–4791 (2014).
39. G. S. Duesberg, "Heterojunctions in 2D semiconductors: a perfect match," Nature Materials, vol. 13, pp. 1075-1076, 2014.
40. M.-L. Tsai, S.-H. Su, J.-K. Chang, D.-S. Tsai, C.-H. Chen, C.-I. Wu, et al., "Monolayer MoS2 heterojunction solar cells," ACS Nano, vol. 8, p. 83178322, 2014.
41. Cheng, R.; Bai, J.; Liao, L.; Zhou, H.; Chen, Y.; Liu, L.; Lin, Y.-C.; Jiang, S.; Huang, Y.; Duan, X. High-frequency self-aligned graphene transistors with transferred gate stacks. Proc. Natl. Acad. Sci. USA 2012, 109, 11588– 11592.
42. Roy, T.; Tosun, M.; Kang, J.S.; Sachid, A.B.; Desai, S.B.; Hettick, M.; Hu, C.C.; Javey, A. Field-Effect Transistors Built from All Two-Dimensional Material Components. ACS Nano 2014, 8, 6259–6264
43. Brajesh Rawat, Vinaya M. M., and Roy Paily,’ Transition Metal Dichalcogenide-Based Field-Effect Transistors for Analog/Mixed- Signal Applications’, IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 66, NO. 5, MAY 2019
44. Z. Dong and J. Guo, “Assessment of 2-D transition metal dichalcogenide FETs at sub-5-nm gate length scale,” IEEE Trans. Electron Devices, vol. 64, no. 2, pp. 622–628, Feb. 2017
45. Hsun-Jen Chuang, Bhim Chamlagain, Michael Koehler, Meeghage Madusanka Perera, Jiaqiang Yan, DavidMandrus, DavidTomańek, andZhixianZhou,’ Low-Resistance 2D/2D Ohmic Contacts: A Universal Approach to High-Performance WSe2, MoS2, and MoSe2 Transistors ‘,Nano Lett. 2016, 16, 1896−1902
46. Qing Hua Wang, Kourosh Kalantar-Zadeh, Andras Kis, Jonathan N. Coleman and Michael S. Strano, Electronics and optoelectronics of two-dimensional transition metal dichalcogenides,Nature Nanotechnology November 2012
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47. S. M. Sze et al., “a floating gate and its application in memory devices”,B.S.T.J. Briefs, 1967
48. Pere Miro ́, Martha Audiffred and Thomas Heine, ”An atlas of two-dimensional materials”, Chem. Soc. Rev., 2014, 43, 6537
49. High Performance Single Layered WSe2 p-FETs with Chemically Doped Contacts
50. Uchida, K., Watanabe, H., Koga, J., Kinoshita, A. & Takagi S.
Experimental Study on Carrier Transport Mechanism in Ultrathin-body SOI MOSFETs, IEDM Tech Digest 47-50 (2002).
51. Yi-Chuen Eng et al., “importance of ∆]^_`abb in evaluating the performance
of n-channel bulk Fin-FET devices”, JEDS.2018.2789922
Device modeling
40
Chapter 2
Device modeling
In this chapter the models used in the simulations are discussed.
2.1 Tight binding model
For any lattice where atoms are arranged in a periodic way, the potential in the crystal is periodic as well, with the same periodicity as the lattice, so that
𝑉c𝑟⃑ + 𝑅g⃑h = 𝑉(𝑟⃑) (2.1)
Where 𝑟⃑ is the generic position vector, and 𝑅g⃑ is a translational vector in the real space lattice that is 𝑚𝐿g⃗, where 𝐿g⃗ is the generating vector of the lattice and m is an integer.
From now on, the discussion will treat a one-dimensional system along the x-axis, with a lattice vector of length a, meaning that each atom is distant a from its neighbors, but the concepts can be straightforwardly extended to two and three-dimensional cases.
Device modeling
41
From the observation in Eq. (2.1) follows that, given its periodicity, the electron wavefunction in the solid can be written in the form given by Bloch’s theorem.
𝜓l(𝑥) = 𝑒nl0𝒰
l(𝑥) (2.2)
Where 𝒰l(𝑥) is a function which shares the same periodicity as the lattice,
while the exponential term introduces a spatial modulation factor, and the k term is the wavenumber in the plane wave multiplicative factor.
Bloch’s theorem can also be restated as follows:
𝜓l(𝑥 + 𝐴) = 𝑒nlq𝒰
l(𝑥) (2.3)
Eq. (2.3) shows that wavefunction 𝜓l along the crystal is periodic, except for
a modulation factor depending on the displacement A.
Applying the boundary condition known as Born-von Karman’s boundary condition, which is valid for large systems
𝜓(𝑥 + 𝑁𝑎) = 𝜓(𝑥) (2.4)
Where N is an integer number such that Na = sample’s length. Since Bloch’s theorem must hold, it follows that
Device modeling 42 𝜓l(𝑥 + 𝑁𝑎) = 𝑒nlst𝑒nl0𝒰 l(𝑥) = 𝑒nl0𝒰l(𝑥) = 𝜓l(𝑥) (2.5)
The above equation requires that 𝑒nlst= 1, or conversely that 𝑘𝑁𝑎 = 2𝜋𝑛,
where n is an integer. This yields to:
𝑘 = 2𝜋𝑛
𝑁𝑎 (𝑛 = 0, ±1 … )
(2.6)
Eq. (2.6) means that the higher the number N the denser are the points in the k-space, to the limit where they seem a continuous variable, and yet are a discrete one (which in turn means that a large system must be considered given that a higher N means that more elementary cells are repeated).
Another important consequence of the plane wave factor is the fact that in the analysis of wave functions we can limit ourselves to a restricted region of k-space points, the Brillouin zone.
This is due to the fact that given a translational vector equal to the repetition of the fundamental cell, which is simply a in the one-dimensional case that we are discussing, the following relation must hold, as a consequence of Bloch’s theorem:
𝜓l(𝑥 + 𝑎) = 𝑒nl0𝑒nlt𝒰
Device modeling
43
The first and last equality require that 𝑒nlt= 1 to be true, which implies that
𝑘𝑎 = 2𝜋𝑛 with n integer. From this condition follows
𝑘 = 2𝜋𝑛
𝑎 (𝑛 = 0, ±1 … )
(2.8)
Eq. (2.8) suggests that in order to evaluate the wavefunctions in the crystal, it is not necessary to evaluate every point in it, but it is sufficient to evaluate individually only points in real space that do not satisfy Eq. (2.7). ie that reside in the fundamental cell.
These points translate into k points that span in the range given by Eq. (2.8); in particular k points are usually considered in the y7zt ,z
t{ range, whose name
is Brillouin zone.
Given these premises, we start from the most fundamental equation in every calculation involving quantum systems, the time-independent Schrödinger equation for a one dimensional system:
− ℏ< 2𝑚
𝑑<𝜓(𝑥)
𝑑𝑥< + 𝑉(𝑥)𝜓(𝑥) = 𝐸𝜓(𝑥)
(2.9)
Eq. (2.9) can also be restated in a more compact form by introducing the Hamiltonian operator
Device modeling 44 Η = −ℏ< 2𝑚 𝑑< 𝑑𝑥<+ 𝑉(𝑥) (2.10)
Thus, substituting Eq. (2.10) into Eq. (2.9) yields to
Η𝜓(𝑥) = 𝐸𝜓(𝑥) (2.11)
Eq. (2.11) is an eigenvalue problem; to solve it we first need to write the Hamiltonian itself.
A fundamental property that any solution to the Schrödinger equation must possess is that 𝜓(𝑥) satisfies Bloch’s theorem.
A functional form of 𝜓(𝑥) that verifies this condition is a linear combination of plane waves [1] that form a complete orthogonal basis set; this solution has the advantage that plane waves can be integrated analytically with relative ease, and that the accuracy of any calculation involving them can be made arbitrarily high given a proper number of plane waves.
The main drawback with plane waves is that they are naturally delocalized in the crystal, meaning that it is difficult to relate them to the atomic orbitals in the solid.
Another option that still verifies Bloch’s theorem is to choose atomic orbitals at each atom site as a basis set.
Device modeling
45
Figure 2.1: Potential along an atomic chain. Adapted from []
Let’s suppose that we have a chain of N identical atoms, and that for each atom we have a function
𝜑€(𝑥 − 𝑅•) (𝑛 = +1, −1 … . 𝑁) (2.12)
In Eq. (2.12) 𝜑€(𝑥) represents the state for the particular orbital at any given
atomic site, with 𝛼 being the index of these orbitals, meaning that 𝛼 spans through every orbital considered at each site.
As an example we will only consider 1s type orbitals.
A function of the form shown in Eq. (2.12) is not viable by itself since it does not verify Bloch’s theorem, but we can use functions 𝜑€(𝑥) as a basis to write
every solution to the Schrödinger equation that does; this procedure is known as Linear Combination of Atomic Orbitals, LCAO.
Device modeling 46 𝜓(𝑥) = 1 √𝑁… 𝑒 nl†‡𝜑 €(𝑥 − 𝑅•) s •ˆ‰ (2.13)
The summation in Eq. (2.13) is carried over every translational vector present in the lattice.
From Eq. (2.13) we can extract the number of bands that we will obtain through the calculations, which is given by the product between the number of atoms in the unit cell that we are considering and the number of atomic orbitals that we are considering for each atom.
We can manipulate Eq. (2.11) to obtain
Š 𝑑𝑥 𝜓∗(𝑥)Η𝜓(𝑥) = Š 𝑑𝑥 𝜓∗(𝑥)𝐸𝜓(𝑥) (2.14)
Now, since the quantity E is a scalar, it can be taken out the integration, then we can calculate the energy as the expectation value of the Hamiltonian operator, so that
∫ 𝑑𝑥 𝜓∗(𝑥)Η𝜓(𝑥)
∫ 𝑑𝑥 𝜓∗(𝑥)𝜓(𝑥) = 𝐸
(2.15)
The form of Eq. (2.15) is the most general form for the energy calculation, since it is not assumed that the wavefunction are already normalized, meaning that it is considered ∫ 𝑑𝑥 𝜓∗(𝑥)𝜓(𝑥) ≠ 1.
Device modeling
47
In order to simplify the notation, from now on we will assume that the wavefunctions are normalized. Thus, substituting Eq. (2.13) in Eq. (2.15) we obtain: 𝐸 = 1 𝑁… … 𝑒nl(†‡7†Ž) s •ˆ‰ s •ˆ‰ Š 𝑑𝑥 𝜑€∗(𝑥 − 𝑅 •)Η𝜑€(𝑥 − 𝑅•) (2.16)
Carrying the summations in Eq. (2.14) over all lattice atoms gives the values of energy at any k-point.
Considering the integrals in eq. (14), we can recognize three cases:
𝑖𝑓 𝑚 = 𝑛 Š 𝑑𝑥 𝜓∗(𝑥)Η𝜓(𝑥) = Š 𝑑𝑥 𝜓∗(𝑥)𝐸 ’𝜓(𝑥) = 𝐸’ (2.17) 𝑖𝑓 𝑚 = 𝑛 ± 1 Š 𝑑𝑥 𝜓∗(𝑥)Η𝜓(𝑥) = 𝑡 (2.18) 𝑖𝑛 𝑎𝑛𝑦 𝑜𝑡ℎ𝑒𝑟 𝑐𝑎𝑠𝑒 Š 𝑑𝑥 𝜓∗(𝑥)Η𝜓(𝑥) = 𝑆 •• (2.19)
Device modeling
48
where 𝐸’ is the energy value of the isolated atom and is called “on-site energy”,
the term t is called “hopping parameter” and the term S represents all other cases.
The latter (S) will be assumed small and thus neglected, hereafter. This is a sensible assumption: it expresses the fact that overlap between localized orbitals belonging to atoms far apart is almost zero.
What we just built goes under the name of “tight binding model” since quantities of interest are calculated for atoms close to each other, that are “tightly binded”.
The meaning behind Eq. (2.15)(2.16)(2.17) is that given a certain atom, namely fixed an index n in the summation, the farthest the next atom considered -- the higher the m index -- the lower is its influence in the calculation, as a consequence of the localization of atomic orbitals.
The most important quantities for the calculation of the band structure are the on-site energies and the hopping parameters; in the following discussion we consider only nearest-neighbor atoms coupled by the hopping parameter, but we could also allow for coupling with atoms further apart, so that we have second-neighbor hopping terms et cetera.
An important aspect to notice is that the calculations for the t-term are in general complicated, so they are not usually carried by definition; the value of
t is normally fitted to band structures obtained through more accurate methods
such ad DFT. These methods are, however, computationally expensive. The Hamiltonian matrix described by Eq. (2.17)(2.18) for a mono dimensional atomic chain has the following form:
Device modeling 49 ⎣ ⎢ ⎢ ⎢ ⎢ ⎡Ε𝑡’ Ε𝑡 0 0 0 0 ’ 𝑡 0 0 0 0 𝑡 Ε’ . . 0 0 0 0 . . . 0 0 0 0 . . . . 𝑡 0 0 0 0 𝑡 Ε’⎦⎥ ⎥ ⎥ ⎥ ⎤
The matrix above is a tri-diagonal matrix of dimension NxN with N being the number of atoms in the chain.
In the principal diagonal we find the onsite energies, while in the others the hoppings appear. This representation makes evident the nearest-neighbor nature of our system.
In order to extract the band structure for the system being considered the following equation must be solved:
Det[Η − EI] = 0 (2.20)
Where I denotes the identity matrix. If we express the Hamiltonian in the reciprocal lattice we can exploit Bloch’s theorem to reduce ourselves to the description of the fundamental cell only, thus Eq. (2.20) must be solved for each of the k pints in the Brillouin zone.
Device modeling
50
2.2 Case study: graphene tight-binding Hamiltonian
As an example, we discuss the application of the tight-binding nearest-neighbor model to the graphene crystal.
Graphite is a 3D material composed by stacked layers of carbon atoms, and each layer is a 2D hexagonal lattice called graphene. Intralayer atomic bondings are covalent, while the interlayer ones are Van der Waals.
Since in bulk graphite the interaction between separate layers is small compared with intra-plane one, the electronic structure of graphene is the same as 3D graphite, to first approximation.
Below is depicted the in-plane arrangement of atoms for graphene in the real space and the cell in the reciprocal lattice.
Device modeling
51
Figure 2.2: hexagonal lattice of graphene, with unitary cell and lattice vectors.
Its Bravais lattice is described by the vectors
𝑎‰ gggg⃗ = √3 2 𝑎, 𝑎 2¡ , 𝑎gggg⃗ = < √3 2 𝑎, − 𝑎 2¡ (2.21)
While the reciprocal space is spanned by 𝑏‰ ggg⃗ = L 2𝜋 √3𝑎, 2𝜋 𝑎O , 𝑏gggg⃗ = L< 2𝜋 √3𝑎, − 2𝜋 𝑎 O (2.22)
The quantity a is defined as 𝑎 = 𝑎£7£√3 where 𝑎£7£ is the “Carbon-to-Carbon”
Device modeling
52
Since it is a known fact that in-plane bonding between carbon atoms is mainly due to 𝑝§ orbitals in graphene, we can limit ourselves to the study of one orbital
per atom. As discussed before, given the unit cell shown in Fig. (2.2), we have two atoms per cell, with one orbital considered per atom, which results in a two band dispersion relation obtained from a 2x2 matrix Hamiltonian.
Considering only first neighbor, we have 3 nearest neighbors for each atom, as show in the following figure.
Figure 2.3: graphene lattice with first second and third neighbors highlighted. From [3]
Using Eq. (2.17)(2.18), neglecting the S term, we obtain:
Device modeling
53
Η‰<= 𝑡 ¨𝑒nlg⃗†ggggg⃗©+ 𝑒nlg⃗†ggggg⃗ª+ 𝑒nlg⃗†ggggg⃗«¬ (2.24)
The 𝑅gggg⃗, 𝑅‰ gggg⃗, 𝑅< gggg⃗ vectors are the ones connecting each atom to its nearest
-neighbors shown in Figure (2.3), and now we have 𝑘g⃗ as a vector of components 𝑘g⃗ = c𝑘0, 𝑘®hsince we are dealing with a bidimensional system.
The remaining term Η<‰ can be readily calculated: given that the Hamiltonian
matrix must be Hermitian in order to give real energies, we have Η<‰= Η‰<∗ .
We can further manipulate the term Η‰< to write
𝑡𝑓(𝑘) = 𝑡 𝑒nl¯t √-⁄ + 2𝑒7nl¯t <√-⁄ cos 𝑘®𝑎 2 ¡¡
(2.25)
And finally build the Hamiltonian as follows:
Η = ²𝑡𝑓(𝑘)Ε’ ∗ 𝑡𝑓(𝑘)Ε
’ ³
(2.26)
Solving Eq. (2.20) with H from Eq. (2.26) we obtain
Device modeling
54 With 𝑤c𝑘g⃗h defined as follows
𝑤c𝑘g⃗h = -1 + 4 cos √3𝑘0𝑎 2 ¡ cos 𝑘®𝑎 2 ¡ + 4 co𝑠< 𝑘®𝑎 2 ¡ (2.28)
Device modeling
55
Starting from the reciprocal lattice we can calculate where the dispersion relation equals zero, and we notice that those points, called the “Dirac points” match with the vertices of the hexagon in the reciprocal lattice, as shown in the following figure.
Figure 2.5: top view of Fig. 2.4 showing the hexagon in the Brillouin zone.
Now, choosing one of the Dirac points, such as ¨𝑘0 = 0 + 𝛿𝑘, 𝑘®=·z-t¬ we can
use Taylor’s polynomial expansion to approximate the region near the point along the 𝑘0 direction, where 𝛿𝑘 is chosen as an infinitesimal displacement
Device modeling
56 |𝑓(𝑘)|<≃ 2 − 2 L1 −3
8𝑎<𝛿𝑘<O
(2.29)
Substituting into Eq. (2.27) we obtain
Εc𝑘g⃗h ≃ Ε’ ± 𝑡-2 − 2 L1 −38𝑎<𝛿𝑘<O
(2.30)
Eq. (2.30) can be further approximated with Taylor’s expansion yielding finally to the form
Εc𝑘g⃗h ≃ Ε’ ± 𝑡
𝑎
2√3𝛿𝑘 (2.31)
From Eq. (2.31) it is clear the linear dependence of the dispersion relation on the k values near the Dirac point.
Device modeling
57
Figure 2.6: comparison between analytical expression and its Taylor approximation. This characteristic is responsible for graphene’s unique electrical behavior, since the absence of gap results in the impossibility of switching off graphene-based logic gates. The linear dispersion relation near the Conduction Band Minimum/Valence Band Maximum results in a problem in the definition of effective mass, which cannot be calculated with the usual formula
1 𝑚∗= 1 ℏ< 𝑑<Ε 𝑑<𝑘 (2.32)
Device modeling
58
In fact, in the case of graphene we have to deal with a “cusp point” where the operation of derivative is not properly defined, that is responsible for the extremely high mobility of carriers in graphene.
2.3 Top of the barrier model
The Top of the Barrier model is a model used to calculate the current in a MOS transistor characterized by ballistic transport, where scattering phenomena do not occur.
This model owes its name to the fact that the quantities of interest are evaluated around the top of the barrier which separates the Source from the channel; there, when no Vds is applied, states with positive K, whose velocity is oriented along the positive x-axis, are occupied in number equal to those with negative K, oriented along the negative x-axis. As a consequence, net electron velocity is zero, so no current can flow.
Device modeling
59
Every state with positive K is occupied by injection from Source contact according to the Source Fermi level, Ef, while those with negative K follow Drain’s Fermi level. It is possible to express Drain’s Fermi level to Source’s by the relation
𝐸º)= 𝐸º*− 𝑞𝑉^b
Figure 2.7: Top of the barrier model at different Vds, from [2]
Device modeling
60
As a consequence, increasing Vds results in the lowering of the Drain’s Ef, which in turn lowers the number of states occupied with negative K, so that net velocity is no longer zero and current can flow.
Since for an electrostatically well-designed MOSFET the charge at the Top of the Barrier is kept almost constant and almost independent of the voltage Vds, the decrease in states occupied by Drain results in an equal increase in states occupied from Source.
This behavior is due to the fact that the Gate lowers the barrier height to allow more electrons from the Source.
From what has been said so far, it is possible to develop an analytical model that provides the current in a MOSFET following the Top of the Barrier model; in particular the calculation for the current can be seen as the difference between the current coming from the Source and from the Drain, so that:
(2.33
)For clarity it is shown the dependence of the quantities of interest from Fermi level from Source and from Drain respectively.
To calculate the quantities presented above we can employ the following expressions:
Device modeling 61 𝐽¼= 1 𝐴 … 𝑞𝑣0𝑓’c𝐸º*h l½,l¯¾’
(2.34)
𝐽7= 1 𝐴 … 𝑞𝑣0𝑓’c𝐸º*− 𝑞𝑉^bh l½,l¯¿’(2.35)
Where A is the normalization surface given by 𝐿0𝐿®,𝐾0 represents the states
occupied along the x-axis, oriented as the channel, while 𝑘® are states occupied
along the y-axis perpendicular to the channel, 𝑣0 is the electron velocity along
the channel, 𝑓’ is the Fermi-Dirac distribution function defined as
𝑓’= 1
1 + 𝑒cÁ7ÁÂh Ã(⁄
where K it the Boltzmann constant and T is the absolute temperature expressed in K.
Device modeling
62
Figure 2.8: plot of the Fermi-Dirac distribution for different T.
It must be noticed that calculations must be performed along 𝑘0, 𝑘® only, since
it is assumed that the thickness of the channel, along the z-axis, is such that electrons can move only in the x-y plane, thus making the problem bi-dimensional.
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63
2.4 Expressions for the current
In order to work out the expressions (2.34),(2.35), we must change from summation to integral; toward that end we multiply by the surface occupied by a state, given by (<apª)ª . In the following expressions a factor of 2 was added to account for spin degeneracy. Then we obtain:
𝐽¼= ‰ q∑ï,½ÅÆ𝑞𝑣0𝑓’c𝐸º*h ⇒ ‰ q aª< (<p)ª∫ 𝑑𝐾®∫ 𝑞𝑣0𝑓’c𝐸º*h𝑑𝐾0 ¥ ’ ¥ ’
(2.36)
Since 𝑓’depends on energy, it is convenient to integrate over energy instead of
over K, to do that we need a relationship between energy and K, that is:
𝐸 = ℏ
2𝑚c𝑘0<+ 𝑘®<h + 𝐸£
(2.37)
Where m is electron effective mass in the parabolic band approximation and 𝐸£ is the minimum of energy in Conduction Band. From relation (2.37) it can
be noticed that it describes a circumference of radius 𝑘 = 𝑘0<+ 𝑘®< where
energy is constant on the border; so we change to polar coordinates with the position:
𝑑𝑘0𝑑𝑘® ⇒ 𝑑𝜃𝑘𝑑𝑘
In polar coordinates, the term 𝑣0 can be expressed as𝑣0 =ℏl•¯, where 𝑘0 =
𝑘 cos 𝜃.
Device modeling 64 1 𝐴 𝐿<2 (2p)< ℏ 𝑚Š 𝑑qŠ 𝑞𝑘 cos 𝜃 𝑓’c𝐸º*h𝑘𝑑𝑘 ¥ ’ z < 7z<
(2.38)
The integral over 𝜃 is calculated from −z< to z< since we must integrate only over the positive-k plane, as seen in (2.34).
Then we can change from integrating over K to integrating over E by the following change of differential:
𝑚𝑘𝑑𝑘 ℏ< = 𝑑𝐸
From expression (2.37), with the position 𝑘 = 𝑘0<+ 𝑘®<we can write
𝑘 =É2𝑚(𝐸 − 𝐸£) ℏ
Substituting in the integral above and reordering terms we obtain
2𝑞 (2p)< ℏ 𝑚 √2𝑚 ℏ< Š cos 𝜃 𝑑qŠ É𝐸 − 𝐸£𝑓’c𝐸º*h𝑑𝐸 ¥ ÁÊ z < 7z<
Integrating over 𝜃 yields to a constant term which multiplies the remaining expression; in order to simplify the expression, we will use
𝛼 = 𝑞 𝜋< ℏ 𝑚 √2𝑚 ℏ<
(2.39)
Lastly we need to calculate
𝐽¼= 𝛼 Š É𝐸 − 𝐸
£𝑓’c𝐸º*h𝑑𝐸
¥
Device modeling 65 𝐽¼= 𝛼 Š É𝐸 − 𝐸 £ 1 1 + 𝑒(Á7ÁÊ)⁄Ã(𝑑𝐸 ¥ ÁÊ Which can be rewritten as
𝐽¼= 𝛼 Š É𝐸 − 𝐸 £ 1 1 + 𝑒(Á7ÁÊ) Ã(⁄ 𝑒cÁÊ7ÁÂh Ã(⁄ 𝑑𝐸 ¥ ÁÊ
Multiplying and dividing the radicand by KT we can make the formal substitution
𝐸 − 𝐸£ 𝐾𝑇 = 𝛾
So 𝑑𝛾 =)ÁÃ( and changing the limits of integration as a consequence of the substitution we obtain 𝐽¼= 𝛼(𝐾𝑇)-<Š É𝛾 1 1 + 𝑒®𝑒cÁÊ7ÁÂh Ã(⁄ 𝑑𝛾 ¥ ’
(2.40)
Integral (2.40) is the usual form of the Fermi-Dirac integral, which has no closed form result and must be integrated numerically. The calculations above are carried for the 𝐽¼ only, since they are analogous to the ones for 𝐽7.
What has been show is a general method for the calculation of 𝐽¼, suitable in
particular for degenerate semiconductor, while in non-degenerate conditions the integral can be simplified by keeping in mind that in non-degenerate conditions the following relation holds
𝑓’= 1
1 + 𝑒cÁ7ÁÂh Ã(⁄ ≅ 𝑒
cÁÂ7Áh Ã(⁄
(2.41)
So the Fermi-Dirac distribution can be approximated as the Maxwell-Boltzmann distribution.Device modeling
66
2.5 Non-degenerate conditions current
The calculations below can be applied in non-degenerate conditions. Following (2.41), we can re-write (2.40) as:
𝐽¼= 𝛼 Š É𝐸 − 𝐸
£𝑒cÁÂ7Áh Ã(⁄ 𝑑𝐸
¥
ÁÊ Which can be written as:
𝐽¼= 𝛼 Š É𝐸 − 𝐸
£𝑒7[(Á7ÁÊ)7(ÁÂ7ÁÊ)] Ã(⁄ 𝑑𝐸
¥
ÁÊ
By making the same substitution presented before, we write the integral as
𝐽¼= 𝛼(𝐾𝑇)-<Š É𝛾𝑒7Î𝑒cÁÂ7ÁÊh Ã(⁄ 𝑑𝛾 ¥
’
(2.42)
Expression (2.42) can be calculated by hand by making the substitution 𝛾 = 𝑡<
By changing the differential accordingly 𝑑𝛾 = 2𝑡𝑑𝑡, substituting in (2.42) and reordering terms we get
𝐽¼= 𝛼(𝐾𝑇)-<𝑒cÁÂ7ÁÊh Ã(⁄ Š 𝑡2𝑡𝑒7Ϫ𝑑𝑡
Ð ’
Device modeling 67 𝐽¼= 𝛼(𝐾𝑇)-<𝑒cÁÂ7ÁÊh Ã(⁄ √𝜋 2
(2.43)
2.6 2-D MOSFET electrostatics
The value of the Top of the Barrier potential is controlled by 2-D electrostatics, as shown in the following picture.
It can be seen how the potential is determined by all three electrodes and their respective capacitances. To calculate potential, we can use superposition, by calculating first the component due to the voltage divider given by the capacitors, and then adding the component due to the mobile charge in the channel. Adding these terms gives:
Figure 2.9: The potential at Top of the barrier is determined by interaction between capacitors. From [2]
Device modeling 68 𝐸£ 𝑞 = −c𝛼Ñ𝑉Ñ+ 𝛼*𝑉*+ 𝛼)𝑉)h + 𝑞𝑛* 𝐶Ò
(2.44)
Where 𝐶Ò = 𝐶Ó+ 𝐶Ô+ 𝐶Õ , 𝛼Ñ=66Ö ×, 𝛼*= 6Ø 6×, 𝛼)= 6Ù6×, and 𝑛* is the charge density in the channel.
Now we must calculate the charge at the top of the barrier, given by
𝑛*= 𝑛*¼+ 𝑛
*7
(2.45)
where 𝑛*¼ and 𝑛*7 can be calculated as
𝑛*¼=1 𝐴 … 𝑓’c𝐸º*h l½,l¯¾’
(2.46)
𝑛*7= 1 𝐴 … 𝑓’c𝐸º*− 𝑞𝑉^bh l½,l¯¿’(2.47)
Again, we need to carry the calculations as integrals instead of summations, by multiplying for the coefficient (<apª)ª we get:
Device modeling 69 𝑛*¼= 1 𝐴 𝐿<2 (2𝜋)<Š 𝑑𝑘® Ð ’ Š 𝑓Ð ’c𝐸º*h𝑑𝑘0 ’
(2.48)
The factor of 2 was introduced to account for spin. As in the previous case the calculation can be better carried by switching to polar coordinates, where, changing coordinates as previously described we obtain
𝑛*¼= 1 𝐴 𝐿<2 (2𝜋)<Š 𝑑𝜃 z < 7z< Š 𝑓Ð ’c𝐸º*h𝑘𝑑𝑘 ’ Given 𝑚𝑘𝑑𝑘 ℏ< = 𝑑𝐸
We can integrate over energy instead of over K and write 𝑛*¼= 𝑚 ℏ< 2𝜋 (2𝜋)<Š 𝑓’c𝐸º*h𝑑𝐸 Ð ÁÊ
In the last expression we already integrated over 𝜃 and reordered all multiplicative coefficients arising from the change of coordinates, while the integration from 𝐸£ can be explained considering that we are integrating for
occupation of states in the Conduction Band, whose lower limit is 𝐸£. Lastly,
defining:
𝑁<^ = 𝑚 𝜋ℏ<
Device modeling
70 We rewrite the integral as
𝑛*¼= 𝑁<^ 2 Š 1 1 + 𝑒cÁ7ÁÂh Ã(⁄ 𝑑𝐸 Ð ÁÊ
The expression above is integrated to obtain
𝑛*¼=𝑁<^
2 ln ¨1 + 𝑒cÁÂ7ÁÊh Ã(⁄ ¬
(2.49)
That is the expression to use in case of degenerate semiconductor, whereas in non-degenerate conditions function 𝑓’ can be approximated as an exponential,
so we get 𝑛*¼=s<ªÚ∫ ‰ ‰¼Û¨ÜÝܬ Þß⁄ 𝑑𝐸 Ð ÁÊ ≅ sªÚ < ∫ 𝑒 cÁÂ7Áh Ã(⁄ 𝑑𝐸 Ð ÁÊ Integrating the following relation is obtained
𝑛*¼=
𝑁<^
2 𝑒cÁÂ7ÁÊh Ã(⁄
(2.50)
From the equations above, the following ones can be used to calculate the current and are always valid:
Device modeling 71 𝐸£ 𝑞 = −c𝛼Ñ𝑉Ñ+ 𝛼*𝑉*+ 𝛼)𝑉)h + 𝑞𝑛* 𝐶Ò 𝑛*= 𝑛*¼+ 𝑛*7
The equations giving 𝑛*¼, 𝑛*7 that we have to use change from (2.49) to (2.50),
if we are using degenerate or non-degenerate conditions respectively. We notice that equation (2.44) and (2.45) need to be solved at the same time. Substituting Eq.(2.44) into Eq.(2.45), after some algebraic manipulation we get:
(2.51)
exp ¨<•ã sªÚ¬ = ä1 + exp å Á¼æc€ç]ç¼€è]è¼€ã]ãh7骇ãê× Ã( ëì (2.52) í1 + exp î𝐸º+ 𝑞c𝛼Ñ𝑉Ñ+ 𝛼)𝑉)+ 𝛼*𝑉*h − 𝑞𝑉)− 𝑞<𝑛 * 𝐶Ò 𝐾𝑇 ïð I = W [J+(E fs) − J−(Efs− q Vds)] ln(N2n2Ds) = Ef+ q (αgVg+ αdVd+ αsVs) −q 2n scΣ KT + ln(1 + exp( q Vds KT ))Device modeling
72
The equations above are both nonlinear equations, so numerical methods need to be employed. Equation (2.51) is obtained for the non-degenerate case where Equation (2.52) is valid for the degenerate case.
