An FPGA-based versatile development system for endoscopic capsule design optimization

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ContentslistsavailableatScienceDirect

Sensors

and

Actuators

A:

Physical

j our na l h o me p a g e :w w w . e l s e v i e r . c o m / l o c a t e / s n a

An

FPGA-based

versatile

development

system

for

endoscopic

capsule

design

optimization

C. Cavallotti

a,∗

_,

_P.

_Merlino

b

_,

_M.

_Vatteroni

a

_,

_P.

_Valdastri

a

_,

_A.

_Abramo

c

_,

_A.

_Menciassi

a

_,

_P.

_Dario

a

a_The_BioRobotics_Institute,_Scuola_Superiore_SantAnna,_Pisa_56100,_Italy b_PTLab,_Agemont_S.p.A.,_Amaro_33020,_Italy

c_DIEGM,_{Universita’}_di_Udine,_Udine_33100,_Italy

a

r

t

i

c

l

e

i

n

f

o

Articlehistory:

Received30September2010

Receivedinrevisedform11January2011 Accepted12January2011

Available online 31 January 2011 Keywords:

FPGA

WirelessCapsuleEndoscopy Sensor

a

b

s

t

r

a

c

t

Thisworkpresentsadevelopmentsystem,basedonFieldProgrammableGateArray(FPGA),thatwas

specificallydesignedfortestingtheentireelectronicstobeintegratedinanendoscopiccapsule,suchasa

camera,animagecompressionengine,ahigh-speedtelemetricsystem,illuminationandinertialsensors.

Thankstoitshighflexibility,severalfeaturesweretestedandevaluated,thusallowingtofindtheoptimal

configuration,intermsofpowerconsumption,performancesandsize,tobefitinacapsule.Asfinalresult,

anaverageframerateof19framepersecond(fps)overatransmissionchannelof1.5Mbit/swaschosen

asthebestchoiceforthedevelopmentofaminiaturizedendoscopiccapsuleprototype.

1. Introduction

WirelessCapsuleEndoscopy(WCE)isanemergingtechnology which is producing a bigimpact onthepracticeof endoscopy. A typicalendoscopiccapsule isequipped withanimaging sen-sor,anilluminationsystem,animageprocessor,aradio-frequency transmitter and a power sourcewhich provides energy to the wholesystem[1].WCEseemstobesuperiorinthediagnosisof thesmallbowelpathologiestootherpainlessimagingmodalities, suchasX-ray,computerizedtomographicenterographyand mag-neticresonanceenteroclysis,becauseitprovidesadirectvisionof somegastrointestinal(GI)tractsotherwisedifficulttoreach with-outsurgery[2].Thistechnologyhashelpeddoctorstodiagnose pathologies suchas obscure GIbleeding, small-bowel tumours, Crohn’s disease,and celiac disease[3]. Moreover,WCE reduces theinvasivenessandpainoftraditionalproceduresresultingmore acceptableforpatients.

Sinceitscommercialdistributionin2002,differentcapsulesare nowavailableonthemarket[4].Despiteofseveralenhancements

[5],mainlimitationsarestillrelatedtocorepartssuchasthevision system.Thecommerciallyavailableendoscopiccapsuletransmits theimagesattheresolutionof256-by-2568-bitpixelswitha maxi-mumframerateof7fps.Thisframerateisnotenoughforarealtime videostreaming,whichishighlydesirableforacorrectdiagnosis. However,theselimitationsmustbeovercometakingintoaccount

∗ Correspondingauthor.

E-mailaddress:c.cavallotti@sssup.it(C.Cavallotti).

thelimitedpowersupplyandthemaximumdimensions(11mm in diameter(d)×31mminlength(l))suitable fora swallowable device.

OuraimistodevelopaWCEdevicewithrealtimevision,thus framerateatleastof15fpsmustbeguaranteedinordertoavoid flashingimages[6].Moreover,ahighimagequalityintermsof fea-tureperception,noiseandsufficientilluminationhastobeassured toachieveacorrectdiagnosis.

Asapreliminarywork,wedevelopedaversatiledevelopment system,basedonanFPGAdevice,fortestingdifferent configura-tionsofsomesub-moduleswhicharecorepartsinthecapsule, suchasacamera,anilluminationsystem,butalsoahighdatarate transmitterandacompressorenginewhicharecrucialtoreachthe desiredframerate.Themainfeatureoftheproposedsystemisthe highflexibility,whichallowstoinvestigatethewholevision sys-temchainandtohighlightthecriticalissues.TheFPGAcoremakes developmentsystemeasy-fittingtodifferentconfigurationswhich canbetestedwithoutanyphysicalhardwarechange.Thissystem canbeusedasacasestudyforassessingtheoptimumconfiguration intermsofperformance,powerconsumptionandoverall dimen-sions,andtosolvethecriticalaspectsbeforetostartthedesignof theminiaturizedversionsuitableforWCEapplications.

2. Developmentsystemarchitecture

The system is composedby three units: a dedicated vision board, a main control board and a third board for debug pur-poses(Figs.1and2).Inthefollowingsectionstheseboardswill bedescribedindetails.

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Fig.1. Developmentsystemwithopticsandilluminationsystem.

2.1. Visionboard

ThecoreofthevisionboardisacustomComplementary Metal-Oxide Semiconductor(CMOS)imagesensor,calledVector2.The chip was produced in the UMC 0.18!-CIS (CMOS Image Sen-sor)technologyandincludesaQuarterofVGA(QVGA)320× 240 pixel array witha Bayer Color Filter Array(CFA) up, the com-pletereadoutchannel,a10-bitAnalog-to-Digitalconverter(ADC), aseriesofDigital-to-Analogconverters(DAC)forinternal refer-encesanddigitalblocksforthechipcontrol[7].AnI2C-likeinput isusedforsettingand controlwhilea seriallow-voltage differ-entialsignaling (LVDS) output interface allows totransmit the data.Arollingshutterread-outisimplementedinorderto max-imize sensitivity of the sensor. Its highsensitivity, low power consumptionandasimplecontrolofthefullchipmakeitsuitable for WCE applications. Taking into account thephysical dimen-sion of the Vector2 sensing area (1.408mminhorizontal(d)× 1.056mminvertical(

v

))andthedepthoffocusfrom1mmto10 mmwhichisdrivenbythefinalapplication,acommercial posi-tivefocallens(NT45-589,EdmundOptics,NewJersey,USA)was chosen,withafocallengthof1mmandadiameterof1mm,thus

achievingafieldofviewof82◦_(h)_×₆₁◦₍

_v

_)._A_plastic,_unreflective

holderwasalsodesignedinordertofixandaligntheoptical mod-uleinfrontofthechip.Thevisionboardallowstoconnectdifferent types ofilluminationsystems. Fourwhite light-emittingdiodes (LED)werearrangedontoaroundshapeprintedcircuitboard(PCB). Thedesignofthisilluminationsystemwascarriedoutconsidering atrade-offbetweenpowerconsumption,sizeandtheamountof lightnecessaryfordiagnosticpurposes.Takingintoaccountthese features high efficiency LEDs (Nesw007AT, Nichia, Nokushima, Japan) were chosenwith a dimensionof 1.2mminheight(h)× 2mminwidth(w)×1.3mminthickness(t)andlightintensityof 1000mcdwithapowerconsumptionof15mA@3.3V[8].

ThewhiteLEDsboardcanbereplacedwithcolorLEDsboard withnomajordesignchangesinthehardware,inordertoobtain whitelightbycolorlightcombination[9]ortoenablespectroscopic imaging,suchasautofluorescenceimaging[10].Inthesecases,the colorLEDsarecontrolledbyindependentdrivingcircuits imple-mentedontheFPGAenablingaprecisecontrolontheamountof lightprovidedtothescene,aswillbeexplanedinmoredetailsin Section3.1.

2.2. ControlboardandFPGAarchitecture

ThecontrolboardisbasedonaFPGAwhichimplementsthe mainfunctionalitiesofthewholesystem.FPGAswereintroducedas analternativetodigitalcustomIntegratedCircuits(ICs)for imple-mentingtheentiresystemononechipandtoprovideflexibility of re-programmabilitytotheuser[11]. Therefore,thanksto its high-flexibilityandlowcost,FPGArepresentsthebestchoicefor testingdifferentsolutionstoselecttheoptimalforourapplication. AdetailedbenchmarkanalysiswascarriedouttochooseanFPGA, suitablenotonlyfortestingpurposebutalsotobeintegratedin afutureminiaturizedversionofthesystem,whichwillbefitted inanendoscopicpill.Asconsequence,parameterssuchaspower consumption,physicalsizeandoverallgatecountweretakeninto account.AcompactsystemfromSiliconBlue(iCE65L08)was cho-senbeing4.79(h)×4.37(

v

)mmin sizewitha verylow power consumption(12mA@32MHz).ThesefeaturesmaketheiCE65L08 suitabletobefitinanendoscopicpill.

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Inordertohavearealtimevideo streaming,aframerateof atleast15fpsisneeded.However,increasingtheamountofdata causeshugeincreaseinpowerconsumptionintheRFtransmission

[12],thatisthemainconstraintinWCE.Hence,applyingimage compressionisnecessaryforlimitingthetransmissionworkload andsavingthepowerdissipation.

A compression engine which is well suited for WCE must havelowpowerconsumption,logicresourcesandlimited mem-orysizeneededforthecompression.CurrentJPEGcompression chipsrequiretheavailabilityofaconsiderableamountofhardware resourcesresultinginahighpowerconsumption(typicallymore than 100mW),which is notacceptablein this application[13]. Amongsimplededicatedalgorithms,wechosethelow-complexity compressionenginedevelopedby[14]becauseitsperformances arecomparablewithJPEG2000,butloweringthecomplexity allow-ingitsimplementationonthechosenFPGA.

TheFPGAisalsousedtodistributetheclocktothewhole sys-tem. The imagesensor is then driven by a 8MHz@1.8V clock, whiletheFPGAinternallogicbya16MHz@1.8Vwithanexternal 32MHz@3.3VoscillatorininputtotheFPGA.

AsinFig.2,severallogicblockswereimplementedontheFPGA inordertocarryoutsomebasictaskssuchastheVector2 config-uration,theimageacquisitionandilluminationcontrol.Moreover, asimplePC-basedsoftwareallowstheusertoconfiguretheFPGA andthevisionchipandtoshowtheacquiredimagesonscreen throughtheUSBconnection.TheVector2configurationtaskis per-formedbytheUSBInterface,theInstruction(n.b.)ControlandI2C Masterblocks.Theconfigurationdata,sentbytheuserthroughthe developedsoftware,arereceivedbytheUSBInterfaceblockthat interconnectstheFPGAwiththeexternalCypress FX2USB con-troller.TheInstructionControlblockdecodestheinstructionsand sendstheconfigurationdatatotheI2CMasterblock.Finally,theI2C MasterconfigurestheVector2chipthroughtheI2Cbus.The Instruc-tionControlblocksendsconfigurationdataalsototheLEDDriverin ordertocontroltheLEDsandtheamountoflightprovidedtothe scene,asitwillbeexplainedinSection3.1.Aftertheconfiguration phase,theVector2Receiverdecodesthedataacquiredbythevision chip,convertingtheLVDSsignalstoa10-bitparallelformat.Then theacquiredframesarestoredintheexternalSRAMchip,whichis usedasaframebuffer.Thememorizedframescanbereadfromthe SRAMbytheMemoryControllerblockandsenttothePCthrough theUSBInterfaceblockandexternalUSBcontroller.

Thelogicblocksimplementedinthisconfigurationarewritten withVHSICHardwareDescriptionLanguage(VHDL),anduse31%1

ofthetotalFPGA(2400logiccells)andcanoperateatamaximum frequencyofabout41MHz.Thepowerconsumptionofthe devel-opedsystemislessthan360mWanditsplitsasfollows:40mW fortheVector2chip,about10mWfortheFPGAand310mWfor debugblockswhichwillbenotforeseeninthefinalminiaturized prototype.

2.3. Debugboard

Thesystemisalsoequippedwithadebugboardtoincreasethe flexibilityofthesystem.TheboardisequippedwiththeCypress FX2USBcontrollerthatprovideshigh-speedconnectionandfully configurabilitybytheintegrated8051microcontroller.Thedebug boardisalsoequippedbytheCypressCY7C1339GSRAMchipthat isusedasframebufferfortheacquisitionofimagesfromthe sen-sorchipandtostoreadditionaldataforimageprocessing.Finally, severalconnectorsareusedtomonitoreachpinoftheFPGA.The

1_We_use_the_logic_cells_as_a_measure_of_the_FPGA_resources_occupation._The pre-sentedareaoccupationreferstothebasicconfiguration,withoutthecompressor, brightnesscontrolblockorwirelesstransmitterblock.

Fig.3.Acquiredimagesfromdifferentgastrointestinaltracts,duringexvivotests.

purposeofthisboardistoprovidearealtimedebugplatformforthe wholedemosystem.APC-basedsoftwareisusedtosetupthe reg-istersoftheFPGAandoftheVector2chipandtomonitorthestatus ofthesystemthroughtheUSBconnection.Theacquiredimagesare storedintheSRAM,senttothePCandshownonthescreen.Finally, theUSBconnectionisusedalsoforthecontroloftheillumination andtheLEDdrivers.

3. Testsandsub-modulesintegration

Some experiments were done totest separately and finally togethereachsub-modulewhichwillbeintegratedinthefinalpill.

3.1. Imagesacquisitionandbrightnesscontrol

Atfirst,imagesfromexvivoanimaltissuewereacquiredusing thevisionboard,withtheopticsandwhiteillumination,inorder todefinetheimagerandilluminationcontrolsettingsnecessaryto achieveasuitableimagequalityfordiagnosticpurposes(Fig.3(a) and(b)).AsimpleLEDdriverwasimplementedintheFPGAable tosettheamountoflightdrivingtheLEDsbyaPulseWidth Mod-ulation(PWM)technique.TheLEDdriverswitchesonandoffthe

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Fig.4.Imageblocksusedtobrightnesslevelestimationandbrightnesscontrolarchitecture.

illuminationduringtheintegrationtimeoftheopticalsensor,thus modulatingtheaveragecurrentprovidedtotheLEDs.Thelength ofthecurrentpulsesprovidedtotheilluminationsystemandtheir numberaresetbyafewinternalregisters,whichcanbemodifided inrealtimewiththeUSBconnection.However,theillumination isswitchedononlywhentheopticalsensorisinitsintegration phaseinordertoavoidflickeringeffects.InthecaseofRGBLEDs, threedriverscontrolledbythreedifferentgroupsofregistersare implementedontheFPGAinordertodriveeach groupof LEDs independentely.SinceinarealapplicationsuchasWCE,itisnot desirabletomanuallysettheproperamountoflight,wealso imple-mentedanautomaticbrightnesscontrolsystem.

Inmodernvisionsystems,thebrightnessoftheacquiredimages dependsonseveralfactors.Amongothers,themostimportantones arethelens,thesensitivityandintegrationtimeofthevisionsensor andtheillumination.Inourprototypethelensischosenbasedon thefieldofviewandsizerequirements,whiletheintegrationtime ofthesensorisfixedinordertoachievethedesiredframerate.Asa consequence,wecansetthebrightnessoftheimagesbycontrolling theamountoflightprovidedtothescene.Thisisequivalentto con-troltheexposuretimeinstandarddigitalcameras.Exposurecontrol algorithmstypicallydividetheacquiredimageinseveralblocksand computetheaverageluminancesignalineachblock.Thentheblock luminancevaluesarecombinedwithdifferentweightsinorderto estimatebacklitorfrontlitscene[15].Sinceinourapplicationthe onlypossiblecaseisthefrontlitbecausetheonlysourceoflightare theLEDs,wedecidedtocomputetheaverageluminancesignalof asingle128×128pixelsblockinthecentreoftheimage(Fig.4). Moreover,wecannotcomputetheluminancevaluesofthepixels becauseoftheBayerCFAmountedontheVector2chipandthe lackofthedemosaicingblock.Consequently,wedecidedto esti-matethebrightnessbasedonlyonthegreenpixelvaluesbecause thegreencomponentmostlycontributestotheluminanceofan image[16]andinaBayerfiltertheirnumberaredoublethanthe redand blueones.Thebrightness controlblockreadsthepixel valuesrecoveredbythereceiveranddrivestheLEDdriverblock accordinglywiththeestimatedbrightnesslevel.Hence,theLEDs intensityiscontrolledtomaintainthebrightnesswithinadefined interval.TheLEDsaredrivenbythedefinedsequenceofcurrent pulsesonlyduringthesensorintegrationtimeinorder to min-imizethepowerconsumption. Thisstrategy allowsnot only to accuratelycontroltheamountoflightprovidedtothescenebut alsotosimulateaglobalshutter.Theentiresensorstartsgathering lightwhentheLEDsareturnedon,whilethecontentsofthe sen-sorarereadoutwhentheyareturnedoff,thusminimizingimage artefacts[17].

TheFPGA implementationoftheproposedbrightness control blockuses320logiccells,whiletheimpactonthemaximumclock frequencyisminimal.

3.2. Columnpatternnoisecorrection

TheCMOSimagersoftensufferfromFixedPatternNoise(FPN)

[18].FPNisanon-temporalspatialnoise,anditiscausedbythe non-uniformityofthetransistor’scharacteristicswithinthepixels andthecolumnamplifier,thisresultingfromfabricationprocess tolerances.ThepixelFPNnoiseisusuallyremovedatthepixellevel byhardwaresubtraction,whileawaytoeliminatethecolumnFPN isasubtractionbetweentheacquiredimageandareferencedark image.Thissimplemethodrequiresthatthedarkimageisacquired and stored intotheFPGA or intheexternal SRAM. Sincea full framecannotbememorizedinsidetheFPGAbecauseofthelack ofmemoryandintherealapplicationitisnotdesirabletousean externalSRAM,wedevelopedandtestedanalternativeversionof thealgorithmthatreducesthememoryrequirements.Ourideais tocomputethemeanvaluesoftheevenandoddrowsofadark imageandtorecursivelysubtractthesefromtheacquiredimages. Inthisway,thememoryrequirementsofthearchitecturecanbe reducedtotworowsonly(2×320×10bits).Wecomputetwo dif-ferentmeanvaluesforevenandoddrowsbecausetheCFAmounted ontheimagerusesapatternof2×2pixels.

Atfirst,theilluminationisswitchedoffandtheFPGAstartsto acquireadarkimage.Eachcoupleofrowsisaccumulatedina two-rowsmemoryinsidetheFPGA.Attheendoftheacquisition,the averagevaluesarecomputed.ThentheLEDsareswitchedonand whenthenextimageisreceivedbytheFPGA,thereferencedark rowsaresubstractedfromeachcoupleofrowacquired.Fig.5(a) showstheimagewiththeFPN,whileFig.5(b)showstheresult ofthecorrectionstrategy.Theresultingimageisbetterinterms ofperceivedresolution.Inordertoevaluatetheeffectivenessof ouralgorithmwecalculatedthestandarddeviationofthe origi-nalimageandtheelaboratedone.Since thefixedpatternnoise isashort-rangenoise,weacquiredawhiteimagewithanuniform illuminationinordertoexcludethecontributionofimagecontrasts anddarkfixedpatternnoise.Weobservedthatthestandard devi-ationoftheimageafterelaborationis20%lessthantheoriginal one.

3.3. Compressorimplementation

In ordertofulfiltheframeraterequirements, a image com-pressorwasimplementedontheFPGA.Severalcompressorswere

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Fig.5. Originalimageanddenoisedimagewithreconstructeddarkimage.

tested[13,19]takingintoaccountthepowerlimitationandsmall sizeconditionswhicharethemainfeaturesofWCE.Forthese rea-sons,alow-power,low-complexitylossycompressorspecifically developed for capsule endoscopy was chosen [14]. The imple-mentedcompressorisbasedonintegerversionofdiscretecosine transform(DCT)andperformssequentiallyfouroperations:color transformation, image transformation, coefficients quantization andentropycoding.Thisconfigurationconsumesabout77%ofthe resourcesoftheFPGAand25blockRAMsandcanworkata fre-quencyofupto39MHz.

Finally,theresultsoftheimplementationofthechosen com-pressorcanbeseeninFig.6(a)and(b).Thefirstpictureshows animage acquiredwithan integrationtimeof 50ms and LEDs switchedonfor25ms,whilethesecondoneshowsthesameimage afterthecompressionstagewitharatioofabout8.Ascanbeseen, thecompressorintroducessomeartifactsduetothelossynatureof thecompressionalgorithm,butthequalityoftheimageissufficient fordiagnosticpurposes.Asafinalremark,itcanbenotedthatthe compressionratiocanbesetthroughaproperchoiceofthe com-pressorparameters,thusallowingthereductionoftheamountof databetween8and20[14].

Fig.6.Acquiredimagesbeforeandaftercompression.

Fig.7. Miniaturizedprototype.

4. Conclusionsandfutureworks

AnFPGA-baseddevelopmentsystemwasdesignedinorderto test a complete wireless imaging acquisition chain suitable for WCE.Thefinalgoalistoachieveasmoothrealtimevideostream withatleast15fpsandlowpowerconsumption.

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Themainchallengefacedintegratingthesystem,inorder to enablearealtimediagnosis,wasrelatedtoimagecompressionand wirelessvideostreamtransmissionvs.theoriginaldatapayload.

After the analysis of several wireless technologies [20], we decidedtoimplementthetransmitterpresentedinRef.[21].The chosensolutionisbasedonnear-fieldtechnologyandpresentsthe bestperformanceintermsofdatarateandthebestefficiencyin termsofpowerconsumptionvs.datarate[20],enablinga trans-missionof1.5Mbit/swithapowerconsumptionof2mW@1.8V.

SincetheVector2imagerresolutionisaQVGAandeachpixelis decodedby10bits,theoriginalamountofdataforeachframeis 768kbit.Consideringanaveragecompressionratioof10,the min-imumframerateis19.53fpswithanoverallpowerconsumption of90mA@3.3Vand26mA@1.8V.

Consideringtheresultsobtainedwiththedevelopmentsystem, aminiaturizedversionwasdesignedandnowundertest(Fig.7). Theprototypeconsistsoftwoboardsconnectedbyapermanent flexible interconnectionwitha diameterof9.9 mmin order to fitinapillcasewithaninnerdiameterof10mm.Moreover,the additionalthreeflexiblecircuitpartsallowtheconnectionofother boardswithcomponentsrequiredbythesystem,suchasbattery orwirelesspowersupply[22]andinertialsensors[23].

Acknowledgements

TheworkdescribedinthispaperwasfundedbytheEuropean CommissionintheframeworkofVECTOR FP6Europeanproject EU/IST-2006-033970.

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Biographies

CarmelaCavallottireceivedadegreeinbiomedicalengineering(withhonours) fromtheCampusBio-MedicoUniversityinRomeinDecember2007.Sheiscurrently aPhDstudentinbioroboticsattheCRIMLaboftheScuolaSuperioreSant’Annain Pisa.Hermainresearchinterestsareinthefieldsofvisionsystemsforbiomedical applications.

PierantonioMerlinowasborninUdine,Italy,in1980.Hereceivedthelaureadegree inelectricalengineering(summacumlaude)fromtheUniversityofUdine,Italy, in2005andthePhDdegreeinelectricalengineeringfromthesameInstitutionin 2009.Hisresearchinterestsincludesthestudyandrealizationofelectronic sys-temsforpervasivecomputingapplications,communicationandpowertechnologies forwireless/contactlessapplications.Currentlyheisworkingonvisionsystemsfor endoscopicapplications.

MonicaVatteroniwasborninLaSpezia,Italy,in1975.ShereceivedanM.S.degreein electricalengineeringfromtheUniversityofPisa(Italy)in2001andaPhDdegreein physicsfromtheUniversityofTrento(Italy),in2008.From2002to2008,sheworked forNeuriCam,Trento(Italy),aspixelengineerandanaloguedesigner,andin2005 shebecameresponsibleforthedevelopmentofCMOSImageSensors.Presently, sheworksfortheScuolaSuperioreSant’AnnainPisa(Italy)aspostdoctoralfellow, wheresheisresponsiblefortheresearchanddevelopmentofimagesensorsand visionsystemsforbiomedicalapplications.Sheistheauthorandco-authorof sev-eralconferenceandjournalpublicationsandofthreepatents.Herinterestsinclude CMOSimagesensors,lownoiseanalogueelectronics,highdynamicrangepixelsand endoscopicvisionsystems.

PietroValdastrireceivedadegreeinelectronicengineering(withhonours)from theUniversityofPisainFebruary2002.InthesameyearhejoinedtheCRIMLab oftheScuolaSuperioreSant’AnnainPisaasaPhDstudent.In2006heobtained aPhDinbioengineeringfromtheScuolaSuperioreSant’Annadiscussinga the-sistitled“Multi-AxialForceSensinginMinimallyInvasiveRoboticSurgery”.Heis nowassistantprofessoratCRIMLab,withmainresearchinterestsinthefieldof implantableroboticsystemsandactivecapsularendoscopy.Heiscurrently work-ingonseveralEuropeanprojectsforthedevelopmentofminimallyinvasiveand wirelessbiomedicaldevices.

AntonioAbramowasborninBologna,Italy,in1962.Hereceivedthelaureadegree inelectricalengineering(magnacumlaude)fromtheUniversityofBologna,Italy, in1987,andthePhDdegreeinelectricalengineeringfromthesameInstitutionin 1995.HisexperienceincludesresearchperiodswiththeIntelCorporation,Santa Clara(CA),USA(1992),attheCenterforIntegratedSystems,StanfordUniversity, Stanford(CA),USA(2000).BetweenOctober1993andDecember1994hewas resi-dentscientistattheAT&TBellLaboratories,MurrayHill(NJ),USA,whilefrom1995 to1997hewaspost-docattheDepartmentofPhysics,UniversityofModena,Italy. AntonioAbramoisco-authorofabout70scientificpublicationsonInternational JournalsandConferences.Inyears2001–2002hehasbeenappointedmemberof the“ModelingandSimulation”technicalsub-committeeoftheIEEEInternational ElectronDeviceMeeting(IEDM)Conference,andinyear2003Chairofthesame sub-committee.Presently,heisassociateprofessorofelectronicsattheUniversity ofUdine,Italy.Afterabout10yearsofscientificactivityinthefieldofmodelingand simulationofcarriertransportinelectrondevices,startingfromyear2001his scien-tificinteresthasmovedtothedesignofcircuitandsystemforwirelessapplications, tothestudyofneuralnetworkscircuitsforreconfigurableplatforms,tothedesign ofwearablesystems,andtowardsthemethodologiesfordistributedcomputingin wirelesssensornetworks.

AriannaMenciassireceivedherlaureadegreeinphysics(withhonours)from the University of Pisa in 1995. In the same year, shejoined the CRIM Lab oftheScuolaSuperioreSant’AnnainPisaasaPhDstudentinbioengineering witharesearchprogramonthemicromanipulationofmechanicaland biologi-calmicroobjects.In1999,shereceivedherPhDdegreebydiscussingathesis

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titled“MicrofabricatedGrippersforMicromanipulationofBiologicalandMechanical Objects”.CurrentlysheisaprofessorofbiomedicalroboticsattheScuola Supe-rioreSant’Anna,Pisa.Hermainresearchinterestsareinthefieldsofbiomedical microandnano-robotics,microfabricationtechnologies,micromechatronicsand microsystemtechnologies.SheisworkingonseveralEuropeanprojectsand interna-tionalprojectsforthedevelopmentofmicroandnano-roboticsystemsformedical applications.

PaoloDarioreceivedhislaureadegreeinmechanicalengineeringfromthe Univer-sityofPisain1977.Currently,heisaprofessorofbiomedicalroboticsattheScuola SuperioreSant’Anna,Pisa.Healsoestablishedandteachesthecourseon mechatron-icsattheSchoolofEngineering,UniversityofPisa.Hehasbeenavisitingprofessorat theEcolePolytechniqueFederaledeLausanne(EPFL),Lausanne,Switzerland,andat

WasedaUniversity,Tokyo,Japan.HeisthedirectoroftheCRIMLabofScuola Superi-oreSant’Anna,wherehesupervisesateamofabout70researchersandPhDstudents. Hismainresearchinterestsareinthefieldsofmedicalrobotics,mechatronicsand microengineering,andspecificallyinsensorsandactuatorsfortheabove applica-tions.HeisthecoordinatorofmanynationalandEuropeanprojects,theeditoroftwo booksonthesubjectofroboticsandtheauthorofmorethan200journalpapers.He isamemberoftheBoardoftheInternationalFoundationofRoboticsResearch.Heis anassociateeditoroftheIEEETransactionsonRoboticsandAutomation,amember oftheSteeringCommitteeoftheJournalofMicroelectromechanicalSystemsand aguesteditoroftheSpecialIssueonMedicalRoboticsoftheIEEETransactionson RoboticsandAutomation.HeservesaspresidentoftheIEEERoboticsand Automa-tionSocietyandastheco-chairmanoftheTechnicalCommitteeonMedicalRobotics ofthesamesociety.