Report on the PhD Activities
Massimo Torquati
February 23, 2019
Short Bio
Massimo Torquati is an Assistant Professor in Computer Science at the
Uni-versity of Pisa since 2014. Before starting to work as an academic researcher
in 2010, he worked for several years in the industry having the opportunity
to participate in large-scale projects also related to parallel computing. In
2015 he started his PhD in Computer Science at the University of Pisa.
Currently, he has published about 100 peer-reviewed papers in conference
proceedings, international journals, and books mostly in the fields of
par-allel and distributed programming and run-time systems for heterogeneous
parallel computing platforms. He was the program co-chair of Euro-Par
2018 international conference and of several international Workshops and
Symposiums. Over the years, he has been involved in several Italian, EU,
and industry-supported research projects including the Artemis SMECY
project, the EU H2020 RePhrase, the FP7 STReP RePaRa and ParaPhrase
projects. He designed and currently maintains the FastFlow parallel
pro-gramming library.
Research Activities
Massimo Torquati’s Ph.D. thesis is focused on the re-design of the new
version of the FastFlow parallel programming library that completes and
strengthens the library that he started developing since 2010. Over the years
the FastFlow pattern-based library was used in three EU-funded research
projects: ParaPhrase, RePaRa and RePhrase. The lessons learned over this
period of research and parallel software development led him to redesign,
restructure and improve the lower level software layers of the library and
also to introduce a new concurrency graph transformation component aiming
at refactoring the parallel structure obtained through patterns and building
blocks compositions. The objectives of the new FastFlow design are twofold:
a) to increase flexibility and composability of the approach while preserving
its efficiency, and b) to introduce new features that open to the possibility
of introducing static optimizations.
He also proposed a small set of highly efficient, customizable and
com-posable parallel building blocks that can be connected and nested in many
different ways and that provides the user with a reduced set of powerful
parallel components. The base idea mimics the RISC approach of
micropro-cessor architectures.
The new FastFlow software layer provides the essential mechanisms to
restructure the data-flow concurrency graph produced by patterns and
build-ing blocks compositions. Straightforward yet effective graph transformations
are transparently and automatically provided to the user through
optimiza-tion flags. Its clean API enables the implementaoptimiza-tion of new and more
pow-erful static optimization policies.
Training Activities
Courses:
• Searching by Similarity on a Very Large Scale
Lecturer: Prof. Giuseppe Amato, CNR Pisa
• Sensor Networks, Internet of Things and Smart
Environ-ments
Lecturer: Prof. Stefano Chessa, University of Pisa (UniPI)
• School on Distributed Computing by Mobile Robots
Lecturer: Prof. Paola Flocchini, University of Ottawa
• The Internet of Everything, Everywhere: Methods and
Tech-nologies for Internetworking Land, Air and Sea
Lecturer: Prof. Stefano Basagni, Northeastern University Boston
• Distributed Computing and Graph Mining
Lecturers: Prof. Pierluigi Crescenzi University of Florence and Prof.
Pierre Fraignaud, IRIF Universit Paris Diderot Paris 7
• Skill Boosting for New (Research) Horizons + System Paradigms
and Models course lectures
Lecturers (Skill Boosting): Prof. Paolo Ferragina (UniPI), Dr. Michele
Padrone (UniPI), Dr. Davide Morelli (BioBeats), Dr. Flavio Tosi
(Business Exploration), Prof. Camilla Van den Boom (Eindhoven
Uni-versity), Dr. Nicola Redi (Venture Factory), Dr. Ray Garcia (Buyont
Capital, NY)
Seminars Cycles:
• Mauriana Pesaresi seminars (2016)
• Modeling and Analysing Variability in Product Families (2016)
• Traffic Network Monitoring (2016)
• Service-based, Cloud-based and Fog computing (2017)
Publications
• M. Torquati, D. De Sensi, G. Mencagli, M. Aldinucci, and M. Danelutto. “Power-aware pipelining with automatic concurrency control.” Concurrency and Computation: Practice and Experience, 31(5), 2019. DOI: 10.1002/cpe.4652
• G. Mencagli, M. Torquati, and M. Danelutto. “Elastic-PPQ: A two-level autonomic system for spatial preference query processing over dynamic data streams.” Future Generation Computer Systems, 79:862 – 877, 2018. DOI: 10.1016/j.future.2017.09.004
• G. Mencagli, M. Torquati, F. Lucattini, S. Cuomo, and M. Aldinucci. “Harnessing sliding-window execution semantics for parallel stream processing.” Journal of Parallel and Dis-tributed Computing, 116:74 – 88, 2018. DOI: 10.1016/j.jpdc.2017.10.021
• M. Danelutto, T. De Matteis, D. De Sensi, G. Mencagli, M. Torquati, M. Aldinucci, and P. Kilpatrick. “The RePhrase Extended Pattern Set for Data Intensive Parallel Computing.” International Journal of Parallel Programming, 2017. (In Press). DOI: 10.1007/s10766-017-0540-z
• M. Torquati, G. Mencagli, M. Drocco, M. Aldinucci, T. De Matteis, and M. Danelutto. “On Dynamic Memory Allocation in Sliding-Window Parallel Patterns for Streaming Analyt-ics.” The Journal of Supercomputing, 2017. (In press). DOI: 10.1007/s11227-017-2152-1 • M. Danelutto, P. Kilpatrick, G. Mencagli, and M. Torquati. “State access patterns in
stream parallel computations.” The International Journal of High Performance Comput-ing Applications, 32(6), 2018. DOI: 10.1177/1094342017694134
• M. Danelutto, D. De Sensi, and M. Torquati. “A power-aware, self-adaptive macro data flow framework.” Parallel Processing Letters, 27(1):1–20, 2017. DOI: 10.1142/S0129626417400047 • D. De Sensi, T. De Matteis, M. Torquati, G. Mencagli, and M. Danelutto. “Bringing
parallel patterns out of the corner: The P3ARSEC benchmark suite. ACM Trans. Archit.
Code Optim., 14(4):33:1–33:26, 2017. DOI: 10.1145/3132710
• D. del Rio Astorga, M. F. Dolz, L. M. Sanchez, J. D. Garcia, M. Danelutto, and M. Torquati. “Finding parallel patterns through static analysis in C++ applications.” The International
Journal of High Performance Computing Applications, 32(6) 2018. DOI: 10.1177/1094342017695639 • M. F. Dolz, D. Del Rio Astorga, J. Fernandez, M. Torquati, J. D. Garca, F.
Garca-Carballeira, and M. Danelutto. “Enabling semantics to improve detection of data races and misuses of lock-free data structures.” Concurrency and Computation: Practice and Experience, 29(15), 2017. DOI: 10.1002/cpe.4114
• D. Griebler, M. Danelutto, M. Torquati, and L. G. Fernandes. “SPar: A DSL for high-level and productive stream parallelism.” Parallel Processing Letters, 27(01):1740005, 2017. DOI: 10.1142/S0129626417400059
• G. Mencagli, M. Torquati, M. Danelutto, and T. De Matteis. “Parallel continuous prefer-ence queries over out-of-order and bursty data streams.” IEEE Transactions on Parallel and Distributed Systems, 28(9):2608–2624, 2017. DOI: 10.1109/TPDS.2017.2679197 • M. Aldinucci, M. Danelutto, M. Drocco, P. Kilpatrick, C. Misale, G. Peretti Pezzi, and
M. Torquati. “A parallel pattern for iterative Stencil + Reduce.” The Journal of Super-computing, 74(11), 2018. DOI: 10.1007/s11227-016-1871-z
• M. Aldinucci, S. Campa, M. Danelutto, P. Kilpatrick, and M. Torquati. “Pool Evolution: A Parallel Pattern for Evolutionary and Symbolic Computing.” International Journal of Parallel Programming, 44(3):531–551, 2016. DOI: 10.1007/s10766-015-0358-5
• M. Danelutto, T. De Matteis, G. Mencagli, and M. Torquati. “Data stream processing via code annotations.” The Journal of Supercomputing, 74(11), 2018. DOI: 10.1007/s11227-016-1793-9
• M. Aldinucci, G. P. Pezzi, M. Drocco, C. Spampinato, and M. Torquati. “Parallel Vi-sual Data Restoration on Multi-GPGPUs using Stencil-Reduce Pattern.” The Interna-tional Journal of High Performance Computing Applications, 29(4):461–472, 2015. DOI: 10.1177/1094342014567907
• M. Aldinucci, S. Campa, M. Danelutto, P. Kilpatrick, and M. Torquati. “Design pat-terns percolating to parallel programming framework implementation.” Int. J. Parallel Program., 42(6):1012–1031, 2014. DOI: 10.1007/s10766-013-0273-6
• D. De Sensi, P. Kilpatrick, and M. Torquati. “State-Aware Concurrency Throttling.” In Proceedings of International Parallel Computing Conference (ParCo 2017), Advances in Parallel Computing, pg. 201–210, 2018. DOI: 10.3233/978-1-61499-843-3-201
• M. Danelutto and M. Torquati. “Increasing efficiency in parallel programming teaching.” In 2018 26th Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP), pg. 306–310, 2018. DOI: 10.1109/PDP2018.2018.00053 • M. Aldinucci, M. Danelutto, P. Kilpatrick, and M. Torquati. “FastFlow: High-Level and
Efficient Streaming on multi-core.” In S. Pllana and F. Xhafa, editors, Programming Multi-core and Many-Multi-core Computing Systems, Parallel and Distributed Computing, Chapter 13. John Wiley & Sons, Inc, 2017. (accepted in 2012). DOI: 10.1002/9781119332015.ch13 • M. Danelutto, T. De Matteis, D. De Sensi, and M. Torquati. “Evaluating Concurrency
Throttling and Thread Packing on SMT multicores.” In 2017 25th Euromicro Inter-national Conference on Parallel, Distributed and Network-based Processing (PDP), pg. 219–223, 2017. DOI: 10.1109/PDP.2017.39
• M. Danelutto, M. Torquati, and P. Kilpatrick. “A DSL based toolchain for design space exploration in structured parallel programming.” Procedia Computer Science, 80:1519 – 1530, International Conference on Computational Science 2016, ICCS 2016. DOI: 10.1016/j.procs.2016.05.477
• M. Danelutto, T. De Matteis, G. Mencagli, and M. Torquati. “A Divide-and-Conquer parallel pattern implementation for multicores.” In Proceedings of the 3rd International Workshop on Software Engineering for Parallel Systems, SEPS 2016, pg. 10–19, 2016. DOI: 10.1145/3002125.3002128
• M. Danelutto, J. D. Garcia, L. M. Sanchez, R. Sotomayor, and M. Torquati. “Introducing Parallelism by Using REPARA C++11 Attributes.” In 2016 24th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP), pg. 354–358, 2016. DOI: 10.1109/PDP.2016.115
• M. Danelutto, T. De Matteis, G. Mencagli, and M. Torquati. “Parallelizing High-Frequency Trading Applications by using C++11 Attributes.” In Proc. of Intl. Workshop on Reengi-neering for Parallelism in Heterogeneous Parallel Platforms (RePara), pg. 140–147, 2015. DOI: 10.1109/Trustcom.2015.623
• M. Danelutto, D. De Sensi, and M. Torquati. “Energy driven adaptivity in stream par-allel computations.” In 2015 23rd Euromicro International Conference on Parpar-allel, Dis-tributed, and Network-Based Processing, pg. 103–110, 2015. DOI: 10.1109/PDP.2015.92 • M. Danelutto and M. Torquati. “Structured parallel programming with “core” FastFlow.”
In V. Zs´ok, Z. Horv´ath, and L. Csat´o, editors, Central European Functional Programming School: 5th Summer School, CEFP 2013, Cluj-Napoca, Romania, 2013, Revised Selected Papers, pg. 29–75. Springer International Publishing, Cham, 2015. DOI: 10.1007/978-3-319-15940-9 2