Dec, 9 2002 Spare Production in Pisa - G.Rizzo 1
Spare Production in Pisa
• All the spare ARCHES completed
– 6 Layer 4 (4 L4A, 2 L4B) – 7 Layer 5 (3 L5A, 4 L5B)
– Many thanks to all the people involved!
• Spare quality good as for installed modules:
*inefficiency evaluated during production is pessimistic w.r.t.
SVT hit reco inefficiency
Average
inefficiency* zed side phi side
SVT arches (2.4+/-1.2)% (4.8+/-1.9)%
Spare arches (1.8+/- 1.1)% (2.5+/-1.6)%
26 HM = 52 ROS
•A few ROS lost redundancy:
•M5A.21 Forw n side: no data right
•M4B.21 Back p side: chip 2 no cmdB
