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(1)

Address Translation

(2)

Main Points

• Address Translation Concept

– How do we convert a virtual address to a physical address?

• Flexible Address Translation

– Base and bound – Segmentation – Paging

– Multilevel translation

• Efficient Address Translation

– Translation Lookaside Buffers

– Virtually and Physically Addressed Caches

(3)

A process in memory

Virtual addresses

Program entry point

base of stack codice

dati stack

0 160

4096

6140 5632

(4)

From compilation to execution

O1 O2 O3

MC S1

S2 S3

Translation (compiler)

library

(linker)Link Load (loader)

S1, S2, S3: source modules; O1, O2, O3: object modules;

MC: esecutable (file);

IP: process image

IP

code

data stack

0 160

4096

6140 5632

(5)

Rilocazione degli indirizzi: rilocazione statica

caricatore rilocante 0

160

LOAD 4112 B:………

JUMP 168 168

192 256

A:………

modulo di caricamento (indirizzi virtuali) 4112

Stack Pointer Program Counter

16380 10240

10400 10432 10408

14352 14336

16380 10496

B: ………

JUMP 10408 LOAD 14352

A: ………

memoria fisica

10240

immagine processo

(6)

Rilocazione degli indirizzi: rilocazione dinamica

caricatore

Program Counter

Stack Pointer

6140 10240

10400 10432 10408

14352 14336

16380 10496

B: ………

JUMP 168 LOAD 4112

A: ………

memoria fisica

160

immagine processo 0

160

LOAD 4112 B:………

JUMP 168 168

192 256

A:………

modulo di caricamento (indirizzi virtuali) 4112

6140

(7)

Address Translation Concept

(8)

Address Translation Goals

• Memory protection

• Memory sharing

• Flexible memory placement

• Sparse addresses

• Runtime lookup efficiency

• Compact translation tables

• Portability

(9)

Address Translation

• What can you do if you can (selectively) gain control whenever a program reads or writes a particular memory location?

– With hardware support

– With compiler-level support

• Memory management is one of the most complex parts of the OS

– Serves many different purposes

– … implements a virtual memory

(10)

Address Translation Uses

• Process isolation

Keep a process from touching anyone else’s memory, or the kernel’s

• Efficient interprocess communication

Shared regions of memory between processes

• Shared code segments

E.g., common libraries used by many different programs

• Program initialization

Start running a program before it is entirely in memory

• Dynamic memory allocation

Allocate and initialize stack/heap pages on demand

(11)

Address Translation (more)

• Cache management

– Page coloring

• Program debugging

– Data breakpoints when address is accessed

• Zero-copy I/O

– Directly from I/O device into/out of user memory

• Memory mapped files

– Access file data using load/store instructions

• Demand-paged virtual memory

– Illusion of near-infinite memory, backed by disk or memory on other machines

(12)

Address Translation (even more)

• Checkpointing/restart

– Transparently save a copy of a process, without stopping the program while the save happens

• Persistent data structures

– Implement data structures that can survive system reboots

• Process migration

– Transparently move processes between machines

• Information flow control

– Track what data is being shared externally

• Distributed shared memory

– Illusion of memory that is shared between machines

(13)

Virtual Base and Bounds

10240 10400 10432 10408

14352 14336

16380 10496

B: ………

JUMP 168 LOAD 4112

A: ………

Physical memory

Process image

Bound register: 6140

+

indirizzo fisico y = 14352 Virtual

address x = 4112

exception

<

si CPU no

MMU

Base register:10240

(16380- 10240= 6140)

(14)

Variable partitions

time D1Mb

t0 Operating System:

D0 Mb

D2Mb

t1 Operating System : D0 Mb

P1 N1Mb

D3Mb

t2 Operating System : D0 Mb

P1 N1Mb

P2 N2Mb

D4Mb

t3 Operating System : D0 Mb

P1 N1Mb

P2 N2Mb

P3 N3Mb

D4Mb

t4 Operating System : D0 Mb

D5= N1Mb

P2 N2Mb

P3 N3Mb

D4Mb

t5 Operating System : D0 Mb

P2 N2Mb

P3 N3Mb

P4 N4Mb

D6Mb

D4Mb

t5 Operating System : D0 Mb

P3 N3Mb

P4 N4Mb

D7=D6+N2 Mb

(15)

Allocation of a new partition

First-fit

among all free partitions take the first one tha that is large enough to allocate the new partition

Best-fit

among all free partitions take the smallest one that is large enough to allocate the new partition

0

I1 I2 I3 I4

L2 L3 L4 L5

Free partitions list

L1

(16)

Fragmentation

Internal fragmentation

memory allocated to a partition but not used/not necessary to the process. Happens if fixed partitions are used.

External fragmentation

the fragments of memory between different partitions are too

small to be used for other memory allocations. Occurs with variable partitions.

(17)

Memory de-fragmentation

Process P1

Process P3 Process P2 Operative system

Process P1

Process P3 Process P2 Operative system

Fragmented memory De-fragmented memory

(18)

Virtual Base and Bounds

• Pros?

– Simple

– Fast (2 registers, adder, comparator)

– Can relocate in physical memory without changing process

• Cons?

– Can’t keep program from accidentally overwriting its own code

– Can’t share code/data with other processes – Can’t grow stack/heap as needed

(19)

Segmentation

• Segment is a contiguous region of memory

Virtual or (for now) physical memory

• Each process has a segment table (in hardware)

Entry in table = segment

• Segment can be located anywhere in physical memory

Start Length

Access permission

• Processes can share segments

Same start, length, same/different access permissions

(20)

Segmentation

0 160

0

LOAD (1,16)B: ……

JUMP(0,168) 168

16 192 256

A: ……

10240 10400 1043210408

34016 34000 10496

B: ……

JUMP (0,168) LOAD (1,16)

Segmented virtual

memory Process image in the

physical memory Physical memory loader

20000 0

A: ……

segment 0: code

segment 1: data

segment 2: stack

Code segment

Stack segment

Data segment

(21)

Segmentation: address translation

<

no si

exception Base table

Segment table

Physical memory

bound base segment sg of the process in

execution I

of sg

CPU x= <sg,of> +

y Bound table

0

n-1 n

no < si exception

D I

D

(22)
(23)

UNIX fork and Copy on Write

• UNIX fork

– Makes a complete copy of a process

• Segments allow a more efficient implementation

– Copy segment table into child

– Mark parent and child segments read-only – Start child process; return to parent

– If child or parent writes to a segment, will trap into kernel

make a copy of the segment and resume

(24)

Segments sharing

I1 I2

I3 I4

I5 I6

I7 I1

I5 I6 I4

L1 L5 L6 L4 0

1 2 3

main funct dati stack

n° base bound

Process P1

main P1

data P1 stack P1

funct

main P2 data P2 stack P2

n° base bound

I7 I5 I3 I2

L7 L5 L3 L2 0

1 2 3

main funct dati stack

Process P2

(25)

Zero-on-Reference

• How much physical memory do we need to allocate for the stack or heap?

– Zero bytes!

• When program touches the heap

– Segmentation fault into OS kernel – Kernel allocates some memory

How much?

– Zeros the memory

avoid accidentally leaking information!

– Restart process

(26)

Segmentation

• Pros?

– Can share code/data segments between processes – Can protect code segment from being overwritten – Can transparently grow stack/heap as needed

– Can detect if need to copy-on-write

• Cons?

– Complex memory management

Need to find chunk of a particular size

– May need to rearrange memory from time to time to make room for new segment or growing segment

External fragmentation: wasted space between chunks

(27)

Paged Translation

• Manage memory in fixed size units, or pages

• Finding a free page is easy

– Bitmap allocation: 0011111100000001100 – Each bit represents one physical page frame

• Each process has its own page table

– Stored in physical memory – Hardware registers

pointer to page table start

page table length

(28)

RPTP

1 2 3 x = 2051

pg = 2 of = 3

pf = 4 of = 3

y = 4*1024+ 3

= 4099

Physical memory

pg

0 1024

2048 3072 4096

5120 6144

frame 0

frame 1 Virtual page 3 frame 2 Virtual page 0

frame 3

frame 4 Virtual page 2 frame 5 Virtual page 1

frame 6

CPU

0

1 2 5 4

Page table

• RPTP: pointer to page table start

• RLTP: page table length

Paged Translation

< RLTP

no

exception yes

R R R/W

R

(29)

AB CD

EF GH I JK L

I JK L

EF GH A BC D 4

3 1

Page Table

Process View Physical Memory

(30)

Paging Questions

• What must be saved/restored on a process context switch?

– Pointer to page table/size of page table – Page table itself is in main memory

• What if page size is very small?

• What if page size is very large?

– Internal fragmentation: if we don’t need all of the

space inside a fixed size chunk

(31)

Paging and Copy on Write

• Can we share memory between processes?

– Set entries in both page tables to point to the same page frames

– Need core map of page frames to track which processes are pointing to which page frames

• UNIX fork with copy on write at page granularity

– Copy page table entries to new process – Mark all pages as read-only

– Trap into kernel on write (in child or parent) – Copy page and resume execution

(32)

Paging and Fast Program Start

• Can I start running a program before its code is in physical memory?

– Set all page table entries to invalid

– When a page is referenced for first time

Trap to OS kernel

OS kernel brings in page

Resumes execution

– Remaining pages can be transferred in the

background while program is running

(33)

Sparse Address Spaces

• Might want many separate segments

– Per-processor heaps – Per-thread stacks

– Memory-mapped files

– Dynamically linked libraries

• What if virtual address space is sparse?

– On 32-bit UNIX, code starts at 0 – Stack starts at 2^31

– 4KB pages => 500K page table entries

– 64-bits => 4 quadrillion page table entries

(34)

Multi-level Translation

• Tree of translation tables

– Paged segmentation – Multi-level page tables

– Multi-level paged segmentation

• All 3: Fixed size page as lowest level unit

– Efficient memory allocation – Efficient disk transfers

– Easier to build translation lookaside buffers

– Efficient reverse lookup (from physical -> virtual) – Page granularity for protection/sharing

(35)

Paged Segmentation

• Process memory is segmented

• Segment table entry:

– Pointer to page table

– Page table length (# of pages in segment) – Access permissions

• Page table entry:

– Page frame

– Access permissions

• Share/protection at either page or segment-level

(36)
(37)

Multilevel Paging

(38)

Two level paging

x =

20

offset Virtual page

10 10

RPTP

1° level table 2° level table ptp2

pf

y = pf of

offset Physical page

Physical page of

L1 L2

CPU pg

12 of

idx2

idx pf

Second level tables are loaded dynamically

==> reduce memory occupation

(39)

Confronto tra tabelle delle pagine a 1 o 2 livelli

IPOTESI:

• Indirizzi logici di 32 bit; pagine logiche e fisiche di 4 kByte.

==> lunghezza del campo offset : 12 bit; indice di pagina codificato con 20 bit

• Descrittori di pagina (elementi della tabella delle pagine) codificati con 4 byte, di cui:

- 3 byte (24 bit) per la codifica dell’indice di blocco;

- 1 byte riservato agli indicatori TABELLA DELLE PAGINE A 1 LIVELLO:

• Numero di elementi della tabella delle pagine: 220

• Spazio occupato dalla tabella delle pagine: 220 * 4= 222 byte= 4 Mbyte

• Massima dimensione della memoria fisica: 224 blocchi

==> 224 * 212 = 236 byte = 64 Gbyte

(40)

Confronto tra tabelle delle pagine a 1 o 2 livelli

IPOTESI (come nel caso precedente)

Indirizzi logici di 32 bit; pagine logiche e fisiche di 4 kByte.

==> lunghezza del campo offset : 12 bit; indice di pagina codificato con 20 bit

Elementi di ogni tabella delle pagine (di primo o secondo livello) codificati con 4 byte, di cui:

- 3 byte (24 bit) per individuare un indice di blocco;

- 1 byte riservato agli indicatori

TABELLA DELLE PAGINE A 2 LIVELLI:

Ipotesi: 210 tabelle delle pagine di secondo livello;

==> La tabella di primo livello ha 210 elementi

==> ripartizione dell’indirizzo logico:

- 12 bit per offset;

- 10 bit per indirizzare la tabella di primo livello

- 10 bit per indirizzare la tabella di secondo livello selezionata;

(41)

Confronto tra tabelle delle pagine a 1 o 2 livelli

TABELLA DELLE PAGINE A 2 LIVELLI:

==> ogni elemento di tabella di primo livello corrisponde a una tabella di secondo livello

- 3 byte: indice di blocco nel quale risiede la tabella di secondo livello (se presente)

- 1 byte: indicatori (tra cui indicatore di presenza).

==> ogni elemento di tabella di secondo livello corrisponde a una pagina - 3 byte: indice di blocco nel quale risiede la pagina (se presente) - 1 byte: indicatori (tra cui indicatore di presenza).

lunghezza di ogni tabella di primo o secondo livello: 210 elementi ==> 210*4

= 4 Kbyte

massima dimensione della memoria fisica : 224 blocchi ==> 224 * 212 = 236 byte = 64 Gbyte.

(42)

x86 Multilevel Paged Segmentation

• Global Descriptor Table (segment table)

– Pointer to page table for each segment – Segment length

– Segment access permissions

– Context switch: change global descriptor table register (GDTR, pointer to global descriptor table)

• Multilevel page table

– 4KB pages; each level of page table fits in one page

Only fill page table if needed

– 32-bit: two level page table (per segment) – 64-bit: four level page table (per segment)

(43)

Multilevel Translation

• Pros:

– Allocate/fill only as many page tables as used – Simple memory allocation

– Share at segment or page level

• Cons:

– Two or more lookups per memory reference

(44)

Portability

• Many operating systems keep their own memory translation data structures

– List of memory objects (segments) – Virtual -> physical

– Physical -> virtual

– Simplifies porting from different processors (x86, ARM, …) from 32 bit to 64 bit

• Inverted page table

– Hash from virtual page -> physical page – Space proportional to # of physical pages

(45)

Do we need multi-level page tables?

• Use inverted page table in hardware instead of multilevel tree

– IBM PowerPC

– Hash virtual page # to inverted page table bucket – Location in Inverted Page Table => physical page

frame

• Pros/cons?

(46)

Efficient Address Translation

• Translation lookaside buffer (TLB)

– Cache of recent virtual page -> physical page translations

– If cache hit, use translation

– If cache miss, walk multi-level page table

• Cost of translation =

Cost of TLB lookup +

Prob(TLB miss) * cost of page table lookup

(47)
(48)

Software Loaded TLB

• Do we need a page table at all?

– MIPS processor architecture – If translation is in TLB, ok

– If translation is not in TLB, trap to kernel – Kernel computes translation and loads TLB

– Kernel can use whatever data structures it wants

• Pros/cons?

(49)

When Do TLBs Work/Not Work?

(50)

Superpages

• TLB entry can be

– A page

– A superpage: a set of contiguous pages

– x86: superpage is set of pages in one page table – x86 TLB entries

4KB

2MB

1GB

(51)

When Do TLBs Work/Not Work, part 2

• What happens on a context switch?

– Reuse TLB?

– Discard TLB?

• Motivates hardware tagged TLB

– Each TLB entry has process ID

– TLB hit only if process ID matches current process

(52)
(53)

When Do TLBs Work/Not Work, part 3

• What happens when the OS changes the permissions on a page?

– For demand paging, copy on write, zero on reference, …

• TLB may contain old translation

– OS must ask hardware to purge TLB entry

• On a multicore: TLB shootdown

– OS must ask each CPU to purge TLB entry

(54)

Address Translation with TLB

(55)

Virtually Addressed Caches

(56)

Memory Hierarchy

Example: i7 has 8MB as shared 3rd level cache; 2nd level cache is per-core HW Design principle:

larger memories are slower; smaller memories are faster

(57)

Translation on a Modern Processor

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