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Central processing unit (CPU)

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(1)

  

  









 





  





  

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(2)



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(3)

   

Central processing unit (CPU)

Control unit

Arithmetic logical unit (ALU)

Registers

Main

memory Disk Printer

Bus I/O devices

… …

(4)

 





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(5)







A + B A + B

A

A

B

B

Registers

ALU input register

ALU output register ALU

ALU input bus

(6)



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(11)

  

(a)

(b) S1:

S2:

S3:

S4:

S5:

1 2 3 4 5 6 7 8 9

1 2 3 4 5 6 7 8

1 2 3 4 5 6 7

1 2 3 4 5 6

1 2 3 4 5

1 2 3 4 5 6 7 8 9

Time

S1 S2 S3 S4 S5

Instruction fetch

unit

Instruction decode

unit

Operand fetch

unit

Instruction execution

unit

Write

back

unit

(12)

 











  

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(13)

  

S1 S2 S3 S4 S5

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unit

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unit

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unit

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unit

Write

back

unit

(14)

 



  

 

S2 S3 S5

Instruction decode

unit

Operand fetch

unit

LOAD Write

back unit S1

Instruction fetch

unit

S4

Floating point STORE

ALU

ALU

(15)

 







  





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(16)

 



Control unit

Broadcasts instructions

Processor

Memory

8 × 8 Processor/memory grid

(17)

  



(a) (b)

CPU

Shared memory

Bus

CPU CPU CPU

Local memories

CPU

Shared memory

Bus

CPU CPU CPU

(18)

  

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Address 1 Cell

0

(c) 1

2 3 4 5 6 7 8 9 10 11

Address

0

Address

1 2 3 4 5 6 7

0 1 2 3 4 5

16 bits

(b) 12 bits

(a)

8 bits

(20)

   

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(21)

  

Address Big endian Address

Byte 0

0

(a) 4

4 8 8

12 12

0 4 8 12 1

5 9 13

2 6 10 14

3 7 11 15

32-bit word

Little endian

Byte 3

(b) 7

11 15

2 6 10 14

1 5 9 13

0 4 8 12

32-bit word

(22)

  

Big endian

(a) J

0 I M

S

4 M I T

H

8 0 0 0

0

12 0 0 21

0

16 0 1 4

Little endian

(b)

J 0 M I

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Transfer from big endian to little endian

(c) J M I

T I M S

0 0 0 H

21 0 0 0

4 1 0 0

Transfer and swap

(d)

J I M 0

S M I T 4

H 0 0 0 8

0 0 0 21 12

0 0 1 4 16

(23)



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(24)





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(27)





Memory word 1111000010101110 0

1 0 2

1 3

0 4

1 5

1 6

1 7

0 8

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0 10

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(28)

   

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(30)





  

Cache

Bus

Main

memory

CPU

(31)



 

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(32)

  

Registers

Main memory Cache

Tape

Magnetic disk

Optical disk

(33)





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(34)

 

Track width is 5–10 microns

Width of 1 bit is

0.1 to 0.2 microns Direction

of arm motion

Disk arm Read/write head Intersector gap

Direct ion of d isk

rota tio n

409 6 d ata bits Preamble

C E C 409 6 da ta bit s

Pr ea m ble

E C

1 s ect or C

(35)



   

Surface 2 Surface 1 Surface 0

Read/write head (1 per surface)

Direction of arm motion Surface 3

Surface 5

Surface 4

Surface 7

Surface 6

(36)





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(38)









P16-19 Strip 16 Strip 17 Strip 18 Strip 12 P12-15 Strip 13 Strip 14 (a)

(b)

(c)

(d)

(e)

(f)

RAID level 0 Strip 8

Strip 4 Strip 0

Strip 9 Strip 5 Strip 1

Strip 10 Strip 6 Strip 2

RAID level 2 Strip 11

Strip 7 Strip 3

Strip 8 Strip 4 Strip 0

Strip 9 Strip 5 Strip 1

Strip 10 Strip 6 Strip 2

Strip 11 Strip 7 Strip 3

Strip 8 Strip 4 Strip 0

Strip 9 Strip 5 Strip 1

Strip 10 Strip 6 Strip 2

Strip 11 Strip 7 Strip 3

Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6

RAID level 1

Bit 7

Bit 1 Bit 2 Bit 3 Bit 4

Strip 8 Strip 4 Strip 0

Strip 9 Strip 5 Strip 1

Strip 10 Strip 6 Strip 2

Strip 11 Strip 7 Strip 3

Strip 8 Strip 4 Strip 0

Strip 9 Strip 5 Strip 1

P8-11 Strip 6 Strip 2

Strip 10 P4-7 Strip 3

Strip 19 Strip 15

RAID level 3

RAID level 4

RAID level 5 Parity

P8-11 P4-7 P0-3

Strip 11

Strip 7

P0-3

(39)





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