Battery pack direct current regulation

The project concerns a possible application of the control strategy in a battery electric vehicle. Consequently, the battery pack DC is a parameter that has to be continuously controlled and regulated, if necessary. In case of hazardous conditions for the battery, the BMS is responsible for imposing more stringent limits for the charging and discharging current rates, with respect to standard safety boundaries. The constraints influence the complete control algorithm, because they are used for filtering the external request: for this reason, the proportional integral regulator is inserted at the beginning of the chain. First of all, the actual current on the DC branch is estimated through a dedicated block. Because this electric quantity flows from the battery towards the inverter in discharging phase – and in the opposite direction during the recharge – it can be computed by using the equation of the three-phase DC/AC converter:²⁰⁷

𝐼̂_𝐷𝐶 = 3𝑉_{𝑅𝑀𝑆,𝑝ℎ𝑎𝑠𝑒}𝐼_{𝑅𝑀𝑆,𝑝ℎ𝑎𝑠𝑒}

𝑉_𝐷𝐶 cos(𝜑) = 3

2

𝑉_{𝑝𝑘,𝑝ℎ𝑎𝑠𝑒} 𝐼_{𝑝𝑘,𝑝ℎ𝑎𝑠𝑒}

𝑉_𝐷𝐶 cos(𝜑)

where:

▪ 𝐼̂_𝐷𝐶 is the estimated DC;

▪ 𝑉_𝐷𝐶 is the constant voltage on battery pack and inverter terminals;

▪ cos(𝜑) is the so-called power factor, i.e. the angle between the current and voltage phasors;

▪ 𝑉_{𝑅𝑀𝑆,𝑝ℎ𝑎𝑠𝑒} = ^{𝑉𝑝𝑘,𝑝ℎ𝑎𝑠𝑒}

√2 is the root mean square value of the phase voltage, while 𝑉_{𝑝𝑘,𝑝ℎ𝑎𝑠𝑒} is the corresponding amplitude (or peak value) of phase voltage;

▪ 𝐼_{𝑅𝑀𝑆,𝑝ℎ𝑎𝑠𝑒} =^{𝐼𝑝𝑘,𝑝ℎ𝑎𝑠𝑒}

√2 is the root mean square value of the phase current, while 𝐼_{𝑝𝑘,𝑝ℎ𝑎𝑠𝑒} is the corresponding amplitude (or peak) value.

Because the direct current is assumed to be negative during the charging phase, the sign of the estimated 𝐼̂_𝐷𝐶 is the same of the actual feedback 𝑖_𝑞. For the evaluation of this quantity, the constant parameter ³₂^cos(𝜑)_𝑉

𝐷𝐶 is passed directly through the real-time interface for reducing the computational complexity of the scheme. The peak value of phase current corresponds to the magnitude of the phasor, so the feedback 𝑖_𝑑 and 𝑖_𝑞 are added vectorially in another SubVI – they are the two components of the vector in the dq reference frame. For the phase

207 Mohan, N., Undeland, T., & Robbins, W. (2003), op. cit., p. 263.

144 voltage peak, the same operation is executed, using the post-saturation direct and quadrature voltage commands in the vector sum. Once obtained all the necessary quantities, the block diagram for estimating the inverter (and battery) DC works properly.

In the PI regulator, the comparison between 𝐼̂_𝐷𝐶 and the positive and negative limit currents happens. Depending on the sign of the estimated DC, one of the two errors is selected. Then, through the proportional and integral branches, the current contributions are computed and added. Finally, the resulting value is subtracted from the user request magnitude, in such a way to reduce the reference quantities only if the PI is effectively working – so if the estimated DC exceeds one of the limits. The user request could be either torque or speed – a selector is managed by a Boolean which sets the desired control strategy, also in presence of a negative demand. Moreover, a relay – i.e. a hysteresis – is inserted in the block diagram for establishing whether the PI has to limit the user request or not. If the magnitude of 𝐼̂_𝐷𝐶 is below the maximum charging and discharging currents, the regulator is totally neglected, and the reference values are not filtered. On the other hand, when 𝐼̂_𝐷𝐶 tries to overcome the discharging limit 𝐼_{𝐷𝐶,𝑝𝑜𝑠} or the charging one 𝐼_{𝐷𝐶,𝑛𝑒𝑔} the request is reduced and the Boolean indicator (PI DC active in the SubVI) is true, for indicating that the PI is operating. The hysteresis is fundamental for avoiding a hazardous ripple when the actual DC is close to the boundaries. In this block, two different couples of multiplier factors are considered, depending on the active control loop. Selectors are inserted for switching from the speed set (𝐾_{𝑝,𝐷𝐶−𝜔}, 𝐾_{𝑖,𝐷𝐶−𝜔}) to the torque set (𝐾_{𝑝,𝐷𝐶−𝑇}, 𝐾_{𝑖,𝐷𝐶−𝑇}), and vice versa.

A particular attention is dedicated to the saturation mechanism: in this situation, the output of the adder must never exceed the user demand. The priority, as well as the PI that manages the flux-weakening region, is given to the proportional term, which is saturated between zero – when the PI is not needed – and the actual external request. The integrator acts for compensating the other contribution and its saturation value is dynamic, because it is equal to the difference between the user request and the output of the proportional branch.

Consequently, the integrator has a limited activity. For all the proportional integral regulators – where a saturation is present, like in this situation – the windup problem must be counteracted for avoiding any delaying accumulation. Similarly to the FW controller, the difference between the pre-saturation and post-saturation values of the integral branch is subtracted from the input of the discrete time integrator. Thank to this operation, the latter stops increasing its output and the windup is cancelled. When the external charging and discharging maximum DC values are very stringent, for example equal to zero in presence of a dangerous operating condition, the filtered request will be null and the saturation of the

two contributions acts in such a way that the adder output equalizes and totally counterbalances the user demand. Concerning the dimension of the variables, knowing the IPMSM parameters, 26 bits are used for the signed estimated battery and inverter DC, with 11 bits in the integer part. The charging and discharging limits can be less precise, so 19-bit words are used (with always 11-bit integer). For the signed output limited request, because it could be either torque or speed, 31 bits are reserved, with 15 bits for the integer section.

At the beginning, the maximum values of charging and discharging battery pack direct current are configurable by the user in the real-time interface – this condition is useful for testing the efficiency of the PI. Then, once implemented the CAN communication, the limits are provided to the engine control unit by a simulated battery management system. Vector CANalyzer tool is used for sending the periodic message containing this information. The proportional integral block diagram is shown in figure 5.23.

Two additional issues are analysed during the real-time simulation, and the FPGA VI is modified in order to overcome the degrading effects. First, in case of loop strategy variation (from torque to speed or vice versa) in correspondence of an active PI for regulating the DC, many peaks and dangerous overshoots are generated. In order to avoid the problem, the switching mechanism is disabled when the regulator is working. By exploiting the Boolean output indicator (PI DC active) and by using logic gates for comparing the different signal states, the speed loop button is deactivated. The second consideration regards the limit of the negative torque. Typically, in automotive application a boundary – for example equal to 30% of the maximum – is imposed for the torque. The user cannot demand a lower value and the developed electromagnetic motor torque must stay above the constraint – for this purpose, a saturation is used in the PI used for passing from the speed error to the 𝑇^∗. In other words, the torque must stay in the range [𝑇_{𝑛𝑒𝑔.𝑙𝑖𝑚𝑖𝑡}, 𝑇_𝑚𝑎𝑥] where 𝑇_{𝑛𝑒𝑔.𝑙𝑖𝑚𝑖𝑡} is negative.

The boundary is configurable in the real-time interface through a dedicated control. In case of stringent maximum DC in charging or discharging conditions, a regulation is applied on the external request. Consequently, also the admissible lowest torque value must be reduced, otherwise in case of speed loop control strategy the direct current could exceed the limit. A proportional integral regulator is inserted in the SubVI for reducing the magnitude of 𝑇_{𝑛𝑒𝑔.𝑙𝑖𝑚𝑖𝑡} similarly to the limitation of user requests. This PI operates only when a negative DC is estimated – corresponding to a negative 𝑖_𝑞 and so a negative motor torque. The implementation of this additional controller is not shown because it is identical to the previous one: the priority is given to the proportional branch and the anti-windup mechanism is internal in the SubVI.

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Figure 5.23: PI for regulating the battery pack (and inverter) direct current, depending on the charging and discharging constraints.