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CMOS INTEGRATED CIRCUITS FOR CAPACITIVE SENSORS INTERFACING

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Academic year: 2021

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Sommario

Visto il grande interesse scientifico ed economico per i sistemi micro-elettromeccanici (MEMS), questo lavoro di tesi è stato incentrato prevelentemente sulla realizzazione di canali di lettura per sensori capacitivi integrati. Nel primo Capitolo, è presentata un’introduzione sui sistemi micro-elettro meccanici e le loro applicazioni. Quindi viene presentata la struttura meccanica dei sensori capacitivi, le differenti interfacce di traduzione e la loro futura applicazione al fine di realizzare reti di sensori wireless.

Nel secondo Capitolo 2, viene descritta un’interfaccia di lettura per un sensore capacitivo di pressione. Vengono dapprima mostrati i dettagli relativi alla parte di lettura del sensore e successivamente sono presentate due tecniche utilizzabili per correggere l’errore di linearità derivante dalla caratteristica di tali tipi di sensori. La prima completamente analogica usa un amplificatore a guadagno variabile e la seconda un convertitore analogico-digitale a caratteristica non-lineare.

Il terzo Capitolo, illustra un’interfaccia di conversione della differenza di capacità generata da sensori capacitivi di pressione in un segnale modulato PWM. Viene presentata un’analisi dettagliata del contributo delle varie sorgenti di non idealità del circuito, quindi viene illustrato un raffronto con le misure effettuate su un test chip. Nel quarto Capitolo, viene presentato una versione migliorata del circuito presentato nel capitolo 3. Il circuito presenta un ridotto consumo di potenza e migliore immunità ai disturbi. Il principio di funzionamento viene discusso in dettaglio mediante analisi teorica sottolineando possibili sorgenti di non idealità e opportune strategie che possono essere adottate al fine di limitare l’effetto.

Nel quinto Capitolo, viene mostrato il design di un convertitore analogico-digitale sigma-delta (SD-ADC) con un processo CMOS 45 nm e frequenza di campionamento di 1 GHz. Vengono mostrati i risultati delle simulazioni effettuate per progettare due convertitori SD-ADC, il primo con architettura feedback il secondo con architettura feedforward.

Nel sesto Capitolo, è mostrata una tecnica che consente di convertire transconduttori (OTA) da classe-A a classe-AB. La tecnica viene illustrata in dettaglio, illustrandone i vantaggi rispetto ad altre tecniche presenti in letteratura. Sono quindi mostrate le migliorie di prestazione che è possibile apportare al sistema iniziale.

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Abstract

Since large scientific and economic interests reside in micro-electromechanical systems (MEMS), this thesis has been focused mainly on the design of read-out channels for capacitive integrated sensors. In the first Chapter an introduction on micro-electromechanical systems and their applications are presented. The mechanical structure of capacitive MEMS, their different transduction interfaces and their future applications in wireless sensor network are illustrated.

In the second Chapter, an interface for a capacitive pressure sensor is described. First the details of the capacitance to voltage conversion interface are shown; then two different techniques used to correct the linearity error related to the sensor characteristic are explained. The first approach uses a non-linear analog amplifier, the second method uses an analog to digital converter with a non linear characteristic.

In the third Chapter, an interface that converts capacitance variations produced by a capacitive pressure sensor in an output pulse width modulated (PWM) signal is shown. A detailed analysis of different contributions due to non-idealities sources of the circuit is discussed; a comparison between the theoretical prediction and experimental measurements on a test chip are shown.

In the fourth Chapter, a second version of circuit presented in the third chapter is shown; the circuit have a reduced power consumption and a better immunity to disturbs. The working principle is described in details, a theoretical analysis underlines possible causes of non ideality identifying the strategies which allow to reduce the effect of these disturbances.

In the fifth Chapter, the implementation of a sigma-delta analog to digital converter (SD-ADC) using the 45 nm CMOS process and with a sampling frequency of 1 GHz is presented. The design flow of two different SD-ADC is discussed; the two converters has respectively a feedback and a feedforward architecture.

Finally in the sixth Chapter, a technique that allows to transform an operational transconductive amplifier (OTA) from class-A to class-AB is presented. The advantages of the proposed method respect other techniques present in literature are shown, also some other improvements that is possible to get respect the original cell are discussed.

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Acknowledgements

I would like to thank Prof. Paolo Bruschi for his guidance, encouragements and support during the course of my research, but also the for having transmitted to me, through his lessons, un unexceptionable interest into analog ic design.

I would like to thank R. H. M. van Veldhoven for his guidance and teachings on the sigma-delta modulators design, and to STMicroelectronics for fabricating most of the devices presented in this thesis.

Thanks to Elisa Parducci and Emilio Volpi for their contributions to the circuit design for the linearization purposes, to Giuseppe Infante for his contributions to the characterization of the OTA based PWM converter and to Eleonora Marchetti and Michele Dei for their contributions to the design of the low-power PWM converter. Thank to people of “Laboratorio di Tecnologie Elettroniche e Microsistemi” at the Department of Information Engineering at University of Pisa for their help.

I would like to thank Lucanos Strambini, Antonio Molfese, Pietro Toscano, Dario Paci, Michele Dei, Monica Schipani, Natanaele Bacci, Silvia Lenci and Mattia Lazerini for sharing every day moments of graduate life.

Thanks to my mother, my sisters and to my friends for their support during this years of studies also during difficult moments. Moreover this thesis work is dedicated to the memory of my father.

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Index

1. Introduction... 1

1.1. Capacitive MEMS... 2

1.2. Capacitive sensors interfaces ... 6

1.3. MEMS in wireless sensor networks... 8

2. Capacitive pressure sensor interface ... 11

2.1. Capacitance Pressure Sensor... 11

2.2. Capacitance to voltage converter ... 12

2.3. Practical implementation of the CVC stage ... 14

2.4. Linearity problem... 20

2.5. Analog linearization approach ... 21

2.5.1. Selection of the Break Voltages ... 23

2.5.2. Circuital implementation... 24

2.5.3. Results of simulations ... 27

2.5.4. Trimming circuits... 29

2.5.5. Layout of the circuit ... 32

2.6. Non linear ADC ... 32

2.6.1. Non linear conversion algorithm... 35

2.6.2. Implementation of the algorithm... 37

2.6.3. Analysis of non idealities associed to CVSA ... 42

2.6.4. Comparator... 45

2.6.5. Control logic... 45

2.6.6. Selection of break points ... 46

2.6.7. Results... 48

2.7. Conclusions... 50

3. Capacitance to pulse duration converters... 51

3.1. A current-mode, dual slope, capacitance to pulse duration converter.. 52

3.2. Effect of non-idealities... 56

3.2.1. Effect of finite gain of OTA2... 57

3.2.2. Noise ... 57

3.3. OTA2 ... 58

3.4. Chip... 61

3.5. Measurement... 62

3.6. Conclusions... 66

4. A low power capacitance to pulse width converter... 67

4.1. Proposed circuit ... 67

4.2. Stimuli Genarator... 70

4.3. Current Amplifier... 71

4.4. Comparator ... 74

4.5. Analysis of non idealities introduced by noise sources... 75

4.5.1. Moving window integration ... 76

4.5.2. Chopping stabilization technique ... 79

4.5.3. Correlated double sampling technique ... 81

4.5.4. Contribution to the total PSD of the pulse trailing edge... 81

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4.6. Input inpedance... 83

4.7. Practical implementation... 84

4.8. Simulations Results... 85

4.9. Conclusion ... 89

5. Sigma Delta Analog to Digital Converter Sampling at 1GHz... 91

5.1. SD modulators ... 91 5.2. Stability of a SD modulator ... 94 5.3. OTA ... 99 5.3.1. Stability ... 100 5.3.2. Schematic ... 102 5.3.3. Layout ... 105 5.4. Feedback architecture ... 107 5.4.1. Loopfilter ... 109 5.4.2. Comparator... 112 5.4.3. DAC ... 113 5.4.4. Layout ... 114 5.4.5. Simulation results... 115 5.5. Feedforward architecture ... 117 5.5.1. Loop filter ... 120 5.5.2. DACs... 123 5.5.3. Layout ... 128 5.5.4. Simulation results... 129 5.6. Conclusions... 131

6. Low power transconductive amplifiers ... 133

6.1. Introduction... 133 6.2. Principle of operation... 134 6.3. Practical implementation... 137 6.4. Conclusions... 140 7. Conclusions... 141 Bibliograpy ... 143

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