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Chapter 1

Fast release of large dielectric membranes for MEMS

applications

The first research activity was focused on a technique to reduce the etching times and increase the freedom in the design of suspended microstructures fab- ricated by bulk anisotropic etching of silicon in tetramethylammonium hydrox- ide (TMAH)-based solutions. As suspended membranes are released through underetch starting at convex corners present in the membrane geometry, by pre-patterning the membrane with periodic convex-corner patterns the release times can be radically reduced. Different periodic patterns are proposed and analyzed, and actual release times for dielectric membranes fabricated in a CMOS-compatible process are presented.

1.1 Release of large MEMS structures

Large suspended structures are fundamental elements in the most diverse MEMS applications, ranging from acoustic devices to energy harvesting to optical sys- tem up to fluidics applications. Several advantages are given from the use of

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MEMS (Micro-Electro-Mechanical System) technology. Besides batch fabri- cation and on chip electronics, for example, in scavenging application, small thickness allow a higher power density and in turn a better efficiency. From the point of view of the fabrication technology the real challenge is the CMOS compatibility with the consequently advantages in term of costs.

In the following, a few examples of applications that require the fabrication of large membranes was presented. Several examples of acoustic devices are presented in literature. In [1] a piezoelectric membrane which works both as a microphone and as a microspeaker, was developed. A 3 mm ⇥ 3 mm silicon nitride membrane (1.5 µm in thick) was fabricated with a 0.5 µm thick zinc oxide (ZnO) piezoelectric thin film on top. Other trasduction mechanism are also investigated. An electromagnetic microspeaker using a PDMS membrane for hearing aids application is presented in [2]. This device transferred the macroscopic speaker working principle to the MEMS domain obtaining a very low power consumption with respect to similar devices. Moreover, Neumann et al. in [3] present a CMOS-compatible MEMS membrane (1.4 mm ⇥ 1.4 mm) based on electrostatic trasduction. The constructed earphone generates audible acoustic output from 40 Hz to 10 kHz. They assert that this kind of device will enable a variety of applications including economical earphones, microphones, hearing aids, high-fidelity earphones, cellular phones and noise cancellation earphones.

Large membrane mirrors find their application in most diverse fields as comunications, ultralarge telescopes and vision adaptive optics systems. In [4] is described a fabrication technique developed for the construction of large area mirror membranes via the transfer of wafer-scale continuous membranes from one substrate to another. Lin et al. [5] have proposed a large-stroke MEMS deformable mirror for wavefront control that is made of a 2.15 µm thick polyimide film and is actuated by electrostatic force.

The development of microfluidic systems has rapidly expanded to a wide variety of fields. Principal applications of microfluidic systems are for chemical analysis, biological and chemical sensing, drug delivery, molecular separation such as DNA analysis, amplification, sequencing or synthesis of nucleic acids and for environmental monitoring. Microfluidics is also an essential part of pre- cision control systems for automotive, aerospace and machine tool industries.

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1.2. A possible solution for fast release

Microfluidics deals with design and development of miniature devices which can sense, pump, mix, monitor and control small volumes of fluids. As an example, Yang et al. [6] have developed s low power MEMS valve. The device fabrication involves the micromachining of three silicon wafers and a glass cap.

The flow control is obtained by means of a termopneumatic actuated silicon nitride membrane.

An important role, in this kind of devices, is played by the mechanical robustness an thus the reliability. Moreover, the fabrication technology have to allow both design and application flexibility.

1.2 A possible solution for fast release

Anisotropic etching of bulk silicon in TMAH (tetramethylammonium hydrox- ide) is a simple and well-established technique for the microfabrication of sus- pended structures (cantilevers, membranes, etc.). The compatibility of TMAH with standard CMOS processing allows the fabrication of micromechanical and microelectronic components on the same chip. However, the peculiar anisotrop- icity of the etch, which selectively attacks {100} crystalline planes, stopping on {111} planes, severely limits the possible geometries for both the etched cavities and the suspended structures, commonly made of the dielectric layers acting as a mask for the silicon etch. The release of the dielectric layers from the underlying silicon is based on the characteristic underetch along higher order planes [7, 8, 9] starting from convex corners present in the initial pattern. As the underetch must advance under the whole span of the layer, release of large structures may take several hours. This problem is a severe practical limit if buffered solutions, designed to avoid etching of aluminum [10, 11, 12], are used, as they age very quickly if not continuously replenished with reagents [13].

A method to solve this problem is to pre-pattern the desired suspended membrane with regular geometries, so that the TMAH etch can advance from several points simultaneously and lead to the release of the membrane in a time which is basically independent from the overall size of the membrane, and only related to the characteristic size of the pattern. The pattern must be chosen so that the evolution of convex-corner etch leads to a complete release of the membrane, irrespective of the membrane geometry.

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d t

l

l

d t

c

(a) X-shape

l d

c

t

(b) L-shape

Figure 1.1: Structure and dimensional parameters of the proposed etch patterns. Red dashed lines represent the repetition pattern standard cell.

To exploit the etching characteristics of TMAH, the membranes must be patterned with holes such that the etched cavities in the silicon, starting from convex corners in the pattern, coalesce into a single cavity and the membranes are fully released. To this purpose, at each time during TMAH etch the un- deretched silicon profile must include convex corners.

To obtain an effective reduction of the etching time, the characteristic di- mensions of the holes must be much smaller than that of the membrane. Also, the total area of the holes must be made small with respect to the membrane area, to reduce the mechanical weakening of the membrane. Two different pe- riodic geometries, an X-shape and an L-shape type, were conceived (Fig. 1.1).

The sides of each shape are aligned along {111} planes.

A qualitative representation of the time evolution of the silicon etch under the patterned membranes is shown in Fig. 1.2. Where a convex corner is present, the etch advances along two more planes, forming an angle ↵ with respect to {111} planes. On the Miller indices of these planes there does not seem to be consensus in the literature, with the most common proposals being of the type {k11}, with k = 2 ÷ 4 [14, 15, 16, 17].

A design constraint on the L pattern is imposed if we require that the line connecting the lower left corner of each L and the upper right corner

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1.2. A possible solution for fast release

(a) X-shape (b) L-shape

Figure 1.2: Structure of the X-type and L-type patterns. Initial pattern is in white.

Convex corners, acting as underetch starting points, are circled. The time evolution of the underetch is shown in progressively darker tones.

of the adjacent L are connect forms a specific angle ↵ with the horizontal arms. Geometrical reasoning shows that a proper choice ensures, everything else equal, the minimum release time.

Clearly, the smaller the L’s/X’s are, the faster the membrane release will be. Three geometrical parameters (t, l, and d) define the two patterns. We note that for the pattern to operate properly (i.e. for the etch to form a single cavity) the overlap d must be positive. Two significant design parameters are also the coverage ⌘, i.e. the percentage of holed area, and the critical dimension c, i.e. the minimum distance between two adjacent holes. To ensure mechanical robustness, and small value for the former and a high value for the latter are desirable. It is straightforward to extract, from pattern standard cells (Fig. 1.1), formulas of the above mentioned parameters for each pattern type:

X-shape 8>

>>

><

>>

>>

:

X= 2lt t2 2(l d)2 cX=p

2 l t

2 d

! (1.1)

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L-shape 8>

>>

>>

<

>>

>>

>:

L = 2lt t2

l2 d2+ 2(l d)2 tan ↵ 1 + tan ↵ cL = (l d) tan ↵

1 + tan ↵

(1.2)

1.3 A small scale validation of the proposed ap- proach

The proposed method has been preliminarily verified by means of laboratory tests. These tests have allowed a rapid validation of the approach to fast release of large membranes. Moreover relevant information have been derived for the subsequent design on a, more expensive, standard CMOS process (STMicro- electronics’ BCD6s).

The patterns were transferred on the test samples by means of an electron beam lithography performed by a Scanning Electron Microscope (SEM). In order to easily obtain patterns without distortions due to electron beam colli- mation, the membrane dimensions are limited up to 100 µm ⇥ 100 µm. Further design constraints were imposed on the geometric dimensions. In order to have a good reflow of TMAH solution, under the membranes, during the etching, the minimum t value was imposed to be 1 µm. Respect to the mechanical robustness the minimum allowed critical distance c is 1 µm.

The patterns which have been tested are of 9 different types. The tests have investigated three values of coverage ⌘ (10%, 20%, 30%), and three kind of patterns (two L-shape and an X-shape). Considering the discrepancies in the literature, in order to establish the correct ↵ angle value, two L-shape geome- tries have been designed with two different values of the angle (corresponding to {211} and {411} planes). In Table 1.1 are summarized geometrical param- eters of each of the designed patterns. The Fig. 1.3 shows two examples of designed membrane layout.

The fabrication of the test membranes is performed starting from p type {100} silicon wafer. Some sample of 1 cm ⇥ 1 cm are cutted from wafer and then rinsed in deionized water (D.W.). A first Buffered-HF (BHF) etch is used to remove the native oxide from the sample surface. In order to growth

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1.3. A small scale validation of the proposed approach

Table 1.1: Test membrane types and dimensions.

Type t l d c

[µm] [µm] [µm] [%] [µm]

L10 {211} 1 16 6 10.8 3.33

L20 {211} 1 9 4 20.8 1.67

L30 {211} 1 5.5 2 29.1 1.17

L10 {411} 1 17 5 10.3 2.4

L20 {411} 1 8.5 3 21.2 1.1

L30 {411} 1.3 6 1 30.9 1

X10 1 15 3 10.1 5.66

X20 1 8 2 20.8 2.12

X30 1 5 1 28.1 1.41

(a) X-shape, ⌘ = 20% (b) L-shape, ⌘ = 10%, ↵ ! {211}

Figure 1.3: Two examples of the membrane layouts. The electron beam resist is pos- itive and hence the dark areas will be removed.

the structural layer (about 50 nm of silicon dioxide), the sample underwent a Rapid Thermal Oxidation (RTO). This step process involves a 10 min oxi- dation at 1100 C under an O2 flux. Each sample contains all nine designed patterns. The membranes layout was transferred on silicon dioxide by means of electron beam lithography and the subsequent 5 min BHF etch. The last step, structure release, is the silicon etch in TMAH solution. In particular, tests were performed at 60 C, in a temperature-controlled bath, in a 25%wt TMAH solution in water.

The first processed sample shows as lower order {100} planes also appear (highlighted in Fig. 1.4(b)). Unfortunately, in Fig. 1.4(a) it is possible to note

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(a) (b)

Figure 1.4: Membranes, with L-shape patterns, of the first sample after 5 min TMAH etch. (a) Unexpected lower order {100} planes are highlighted in red. (b) Suspended oxide collapsed at the bottom of the cavity.

(a) 5 min (b) 10 min

(c) 15 min (d) 20 min

Figure 1.5: Example of the etch evolution for a membrane with X-shape pattern and 30% coverage.

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1.4. Structure design

how the suspended oxide is collapsed at the bottom of the cavity. The problem is caused by residual stresses formed during the growth of the silicon oxide.

In order to release these stresses the subsequent samples underwent a thermal treatment in oven (30 min@1000 C).

The silicon etch in TMAH solution was performed in a seven successive 5min steps to monitor the etch evolution (Fig. 1.5). As expected, increasing the coverage, the release time is smaller. The X-shape pattern is faster than the L-shape one at the same l. Moreover, the X-shape pattern has a larger critical distance c and then a better mechanical robustness in addition to a more regular geometry. An estimate of the value of angle ↵ was extracted from SEM images, by observing that the formed planes all belong to the {211}

family.

In conclusion, a small scale validation of the proposed approach was given.

It is important to note that the release times of the membranes depend only on the pattern geometry and not on the size of the membrane itself. Furthermore, the tests have given useful informations to the membrane design on a standard CMOS process.

1.4 Structure design

Preliminary tests confirmed the validity of the proposed method. In order to investigate on the possibility of integration of this kind of mechanical structure in a standard CMOS process, the research activity moved to the design of patterned membrane on the STMicroelectronics’ BCD6s process.

As design criteria, we chose t = 10 µm, and two different coverage values (15 and 25%, respectively, which allowed acceptably large values for the critical dimension). Based on literature data and preliminary experiments, we chose

↵ = arctan(1) arctan(1/2). With these choices, we designed four different types of patterns, whose characteristics are summarized in Table 1.2. The pattern were repeated in several square membranes, clamped on two opposite sides, and 300 µm ⇥ 300 µm in size. Each membrane was implemented in two different technological options, M1 and M2 (see next section for details).

To test the versatility of the method, long (1320 µm ⇥ 300 µm) rectangular membranes. Reliability of serpentine-spring was also tested by including sus-

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Table 1.2: Membrane types and dimensions.

Type t l d c

[µm] [µm] [µm] [%] [µm]

L15 10 80 7 15.1 24.3

L25 10 48 7 25.5 13.7

X15 10 75 7 15.1 36.0

X25 10 54 10 25.3 17.0

(a) Metal1 X25 (b) Metal2 X15

Figure 1.6: ANSYS simulation outputs. The membranes was implemented in two different technological options, which result in two different thickness.

pended membranes. Moreover, these membranes were designed to have their resonance frequencies in the audio range. This choice aims at the evaluation of the mechanical properties of the membrane-spring system, simply by a speaker stimulation. As shown in Fig. 1.6 have been simulated two kinds of springs which differ in their thickness. The simulated membrane resonance frequency are ranging from 5 to 10 kHz.

The designed membranes are implemented on the STMicroelectronics’ BCD6s process. The fabricated chip contains several membranes designed in two differ- ent thicknesses (see section 1.5). In particular, there are eight clamped-campled square membranes with different pattern types and different thicknesses. Two rectangular membranes with and without springs and two more square mem- branes suspended to springs are also present (Fig. 1.13).

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1.5. Experimental test

1.5 Experimental test

The membranes were fabricated with a two-phase process. In the first phase, a standard VLSI technology (STMicroelectronics’ BCD6s, a mixed technology which includes a full CMOS sequence) was used to define the geometry of the membranes, which are composed of the intermetallic dielectric layers. Two different membrane structures were conceived: a first type composed of the di- electrics between the silicon substrate and the first metal level (M1-type mem- branes), and the second composed of all the dielectrics between the substrate and the second metal level (M2-type membranes). In both cases, the metal on top of the dielectrics was used as a masking layer for the second phase of the fabrication, consisting in the actual definition and release of the membranes.

In a standard IC design the metals would be embedded in the upper dielectric layers (Fig. 1.7(A)). In our case the layout rules were purposely violated so that a few of the technology etching steps (i.e. pad opening) could be used to remove these upper dielectrics. A sketch of the cross sections of the two structures as they are received from the foundry is shown in Fig. 1.7(B). The final thickness of the two types of membranes, as deduced from the technology specifications, are about 1.2 µm (M1) and 2.6 µm (M2).

It is worth to note that, although such an option was not implemented in the presented structures, the M2 membranes can be designed to embed an interconnection layer in metal 1, adding to the flexibility of the designed structures (for an example of this approach see [18]).

During the second, post-processing phase several wet-phase etches are per- formed. A first BHF etch is used to transfer the periodic pattern (drawn in the metal layer) down to the silicon substrate (Fig. 1.7(C)). A 25 min etch with a standard BHF formulation (HF(48%) : NH4F(40%) 1:6 vol.) is required.

Because of the long etching time and isotropicity of the BHF, a certain overetch of the oxide is observed. An aluminum etch (H3PO4(85%) : HNO3(65%) : CH3COOH : D.I. water 16:1:1:2 vol.) is used to remove the metal masking layers, which are now exposed (Fig. 1.7(D)). Given the test nature of these experiments, we did not protect any of the chip area with photoresist, a step which would be certainly required (for example, to protect the electrical pads of on-chip electrical/electronic components) when the proposed process is used

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(a) M1 type (b) M2 type

Figure 1.7: Cross-section of M1- (left) and M2- (right) type membrane structures at different post-processing steps. For more details see text.

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1.5. Experimental test

in a real application.

Finally, the silicon etch in TMAH-based solution is performed. Two dif- ferent TMAH formulations were used: while initial tests were performed with a 25%wt TMAH solution in water (solution A in the following), subsequent experiments were carried out with a modified (with 20 g/L of silicic acid and 6 g/Lof an oxidizing agent, ammonium peroxodisulphate) 5%wt solution of the type first described in [10], (solution B in the following), which does not etch aluminum and can thus be used for CMOS-compatible post-processing. All sil- icon etches were performed at 85 C in a temperature-controlled bath. While the TMAH etch evolves (Fig. 1.7(E-F)), underetch at convex corners creates a single void volume under each membrane. The different types of membranes are released at times depending on the TMAH solution formulation, etching temperature, and pattern dimensions (but not membrane dimensions).

A large series of samples, containing the aforementioned structures, were etched with the two different TMAH formulations and for several different etching times, ranging from 5 to 125 min. A first set of measures was carried out to determine the etching speed of the {100} family of planes, i.e., the planes parallel to the wafer surface (and bottom of the etched cavities), by determining the depth of the cavities at different etching times. The sides of each cavity are limited by {111} planes, which are not etched. As the angle between {100} and {111} planes in known (54.73 ), from a measure of the width of the cavity sides as projected in top view in SEM images the cavity depth can be computed. To ease the measurements, the membranes were etched away in HF, so that the features of the underlying cavity were clearly visible. For the 25% TMAH solution (type A) the measured etch rate was 31 µm/h, while for the 5% buffered solution (type B) it was 60 µm/h. These values are coherent with the literature [12, 19].

The SEM images were also used to determine the type of the higher order, convex corner-started planes of type {k11}. Specifically, the angle formed be- tween these planes and {111} planes at the wafer surface was measured. To allow the systematic analysis of several dozens of images, the extraction of the angles was automated. The border of each cavity was extracted with stan- dard edge-detection algorithms, and a custom MATLAB script was used to extract each of the segment constituting the border by least-square optimiza-

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Figure 1.8: SEM image of a L15-type cavity after 45 min of etch. The membrane was etched away for clarity. Superimposed in yellow are the detected edge (thin continuous line) and extracted border segments (thick red dotted line).

tion (Fig. 1.8). Each segment represents the intersection between the sides of the cavity and the wafer surface.

The segments from every image were then grouped in a single dataset Fig. 1.9, and the weighted average slope of each segment group (with weights equal to the segment lengths) was determined. The angles between {111} and {k11} planes thus determined are 18.7 (solution A) and 18.3 (solution B).

This angle is coherent with a value of k = 2, as the expected angle between the two planes in this case would be arctan(1) arctan(1/2) = 18.43 .

An important feature of the etch, as revealed also by Fig. 1.8, is that lower order {100} planes also appear at the cavity sides as the etch evolves.

Finally, from the application point of view, the most significant parameter is the release time of the membranes, and how this time compares to the time required to release a full membrane (i.e. without holes) of the same size. The release time was determined as the smallest observed time for which the mem- brane was completely separated from the underlying substrate. These times are summarized in Tab. 1.3 for different geometries and solutions. The release

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1.5. Experimental test

300 600900

-5 0 5 10 15 20 25 30 35 40 45 5550 60

(a) Solution A

300 600900

-5 0 5 10 15 20 25 30 35 40 45 5550 60

(b) Solution B

Figure 1.9: Measured plane angles for samples etched with solution A and B. Each vector represents a segment of the cavity border. Data are grouped along {111}, {211}, {100} directions.

Table 1.3: Release times for 300 µm ⇥ 300 µm membranes. All the times are in min.

Type Solution A Solution B

M1 M2 M1 M2

L15 - - 65 60

L25 55 55 40 40

X15 - - 40 40

X25 40 37.5 22.5 20

times for L15 and X15 membranes in type A solution were longer than the maximum time and could not be determined. The slight differences between M1 and M2 membranes are to be attributed to the larger actual width of the patterns for M2 membranes, caused by larger overetch during the BHF etch.

We note that the release times are significantly smaller for solution B (but this is just a consequence of this solution being overall faster), and that the higher the coverage, the smaller the release time. Also, X-patterns are to be preferred to L-patterns with similar characteristic dimensions.

It is also noteworthy that the aforementioned X25 type membrane, 300 µm⇥

1320 µmin size, was released in 22.5 min in solution B, exactly like its smaller counterpart, despite being more than 4 times larger in area (Fig. 1.11). As a further example of the method possibilities, a SEM image of a spring-suspended

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Figure 1.10: SEM image of a M2, X15 type, spring suspended membrane. Nominal width of the cross arms is 10 µm.

membrane of type M2 is shown (Fig. 1.10).

Because of area constraints, full membranes were not included in the test chip. However, a reasonable estimate of the release time of a full membrane can be carried out. From SEM images we measured the etch speed of {211} planes (or, more exactly, the speed of the intersection of this plane with the wafer surface) in solution B as 98 µm/h. To release a 300 µm⇥300 µm membrane with four free sides, this plane must proceed to the center of the membrane, moving for a distance of 150p

2 / cos(45 ↵) = 190 µm, or about 115 min of etch. This is an improvement of a factor between 1.75 and almost 6, depending on the pattern type. This factor would be comparatively larger for smaller pattern dimension, or larger membranes. A similar computation for the 300 µm ⇥ 1320 µmmembranes, for example, results in an estimated release time of around 6 hours for its unpatterned counterpart, a number to be compared to the actual 22.5 minfor the membrane of Fig. 1.11.

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1.6. Etch evolution: a simple mathematical model

Figure 1.11: SEM image of a released 300 µm ⇥ 1320 µm, M1, X25 type membrane.

The membrane bow is caused by the release of the intrinsic film stress gradient, generated during film deposition. On the bottom of the cavity, residual silicon hillocks are visible.

1.6 Etch evolution: a simple mathematical model

If the etch rates of high order planes are known, it is straightforward to de- rive an analytical model for the release time. Obviously, the planes etch rate depends on several variables such as temperature, etched planes and solution formulations.

Considering only the buffered-TMAH solution (type B), because of its CMOS compatibility, by experimental tests were obtained the value of the planes etch rate. The measures from SEM images result in an {100} planes etch rate (v100) of about 60 µm/h, while about 98 µm/h for {211} planes (v211).

The characteristic distances from which the model was extracted, are high- lighted in Fig. 1.12. Each distance represents one the steps in which the etch can be divided. All the etch rates were defined as referred to the 45 direction.

The etch rate along the v211direction was converted to 45 by computing the

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d1

c d d2 da

d3

l

t

(a) X-shape

l

t

d

d1

d2 d4

c

d3

l-c-d

l

t

d

d1

d2 d3

c

l-c-d

2 d4 45 gradi

c

t

l d1

d2

da

d3 d4 d

(b) L-shape Figure 1.12: Characteristic distance of the release time analitical model.

rate at which a vertex between two {211} planes moves:

vver= v211

cos 4 ⇡ 110 µm/h (1.3)

The experimental tests show as lower order {100} planes are also present.

To ensure that the model takes into account the possible effect of these planes, the longer between two times (the time required by the aforementioned vertex to cover the distance d2, and the one required by a {100} plane to cover the distance da) has to be considered.

These remarks lead to the release time formulas, one for each pattern type are reported:

X= d1

vver

+ max ( d2

vver

, da

v100

) + d3

vver (1.4)

L= d1

vver+ max ( d2

vver, da

v100

)

+d3+ d4

vver (1.5)

where the characteristic distances of the model reported in Fig. 1.12 are given

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1.6. Etch evolution: a simple mathematical model

Table 1.4: Comparison between experimental test and analytical model. Times are in minute.

Type Experiments Model

L15 M1 65 66

L15 M2 60 64

L25 M1 40 33

L25 M2 40 31

X15 M1 40 46

X15 M2 40 44

X25 M1 22.5 25

X25 M2 20 23

in the following, for the X and L pattern, respectively.

X-shape 8>

>>

>>

>>

>>

>>

><

>>

>>

>>

>>

>>

>>

:

d1= l t p2

tan ↵ 1 + tan ↵ d2= l t 2d

p2

1 1 + tan ↵ da =l t 2d

2p 2 d3= l 2d

p2

(1.6)

L-shape 8>

>>

>>

>>

>>

>>

>>

>>

><

>>

>>

>>

>>

>>

>>

>>

>>

:

d1=p

2 (l t) tan ↵ 1 + tan ↵ d2=p

2l t (1 tan ↵) d 1 + tan ↵ da =l t 2d

p2

d3=p

2 d tan ↵ 1 + tan ↵ d4=p

2 (l d) tan ↵ 1 + tan ↵

(1.7)

In Table 1.4 the comparison of the release time obtained from the analytical model and the experimental ones, are reported. It is important to note that the calculated release times are different for the two metal options. This is because a different BHF underetch takes place in the two cases.

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The calculated release times are always greater but still close to the ex- perimental values except for L-pattern membranes with 25% coverage. This is probably due to the small size of the hole that inhibits the proper flow of the buffered-TMAH solution with a consequent reduction of the etch rate.

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1.6. Etch evolution: a simple mathematical model

(a)

(b)

Figure 1.13: Fabricated chip. (a) layout and (b) optical image. The membranes are highlighted with yellow rectangles. The resonators, discussed in Chap- ter 2, are highlighted in red, while the two op-amps in green.

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