Analysis and design of VLSI cells for diagnostic and control of an H-Bridge for automotive application

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Analysis and design of VLSI cells for diagnostic

and control of an H-Bridge for automotive

application

26/09/2014

Supervisors

Prof. Luca Fanucci ... Tutors

Ing. Luigi Di Piro ... Candidate

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The great development of the automotive industry that has experi-enced in recent years has developed electronics applications inside a car that currently are many and extremely diversied, many however, now so deeply rooted, that the passengers who daily they benet never no-tice their benets. This thesis was developed within Austriamicrosystems design centre of Navacchio in Pisa, automotive section, using CMOS 0.35 m high-voltage technology. The growth of the market and the demands of the same, in fact, lead to the conception and implementation of more ad-vanced technologies, which combine robustness and reliability with sizes as low as possible. Within the automotive sector, the work of this thesis is the full-custom design of analog cells for diagnostics of an H-BRIDGE. In fact, the number of electric motors inside a common car is considerable, it may even reach eighty if it's considered vehicles of higher categories. This wide use leads to the necessity of suitable control circuits, which present good characteristics of reliability. The classic mechanism of driving a mo-tor based on the use of a bridge switches, which until some years ago was implemented exclusively through discrete components, now the modern technologies allow to integrate it together with the control logic, at least for currents not too high. A complete circuit for the control of the motors is instead constituted by a complex system, which has its most important part in a controller, typically a digital microcontroller since some years. Several control, monitoring and safety devices operate around it. First of all they are appropriate drivers, which will have to drive the gate of the MOSFET of the bridge. There are also circuits of protection against over-voltage and reverse power, voltage regulators, charge pumps, tem-perature sensors, often circuits for the PWM control. It is almost always present a device for limiting the current in the motor, as well as a circuit for its detection, since knowing the current measurement is essential in the control of a motor, since it is directly proportional to the torque. The thesis is divided into the following four chapters:

• The rst chapter represents a kind of introduction to what is the world of automotive electronics, showing the environment in which the circuits designed are used, focusing primarily on the largest technological development of recent years.

•The second chapter introduces the H-Bridge circuit, analyzing it in all its parts and highlighting the key aspects for the design.

•In the third chapter is presented the problem of the current meas-urement in the bridge focusing the attention to a possible design solution based on customer specications.

•The fourth chapter present a complete full custom design of a vds monitor cell, starting analyzing the customer specications, describing the functionality of the schematic, then showing simulation and results compared with the customer specication and nally realizing the layout of the entire cell.

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1 Electronics in the automotive

1.1 Market development

In the last twenty years, the role of electronics in automotive advancement gained a primary importance. Electronic systems started to appear in vehi-cles in the 1980s and now, most of today's cars have several hundreds of sep-arate electronic controllers (ECUs), 4 kilometers of electrical cables and 100 million lines of software code. Therefore industry observers expect that the electronic components will cost for 40% of total car production costs in the near future. Car producers are already relying more heavily on electronics tech-nology, with electronic components making up 10-15% of the total production cost of a 2007-model compact car, for 20-30% of the cost of luxury models, and for around 50% in the case of hybrid electric vehicles. Electronic components currently comprise some 20-30% of total costs for all car categories, and this gure is expected to reach 40% by 2015. Nowadays, materials and components represent 70% of total car production costs, while work costs account for 15% and miscellaneous expenses for the remaining 15%. If present trends continue, by 2015 electronic component costs will comprise the majority of materials and components costs. Moreover, driven by the continuous requests to develop new safety and infotainment devices, the automotive IC market is forecast to grow 52% from US$18.2 billion in 2012 to US $27.7 billion in 2016. If this trends will be conrmed, this growth will translate into an average annual increase of 11%. See Fig. 1.

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1.2 Applications of automotive electronics

A car with full manual control is now a memory of the past. There are semicon-ductors that, in a modern car, manage and control almost all functions (even those that until recently did not even exist) and the application elds are mul-tiple:

• Electronic engine control

• Diagnostics (for detection of faults in the system) • Control of driving and speed

• Security • Entertainment

The specic applications are therefore various and numerous, as can easily be seen from Fig. 2

Figure 2: Examples of electronic devices in a Vehicle

It was said that, more and more often, it is preferable to replace some mechanical and electromechanical parts with electronics systems that ensure greater exibility and reliability. Accessories such as water pumps, power steer-ing, air conditioners and cooling systems are then managed by the electronic units which avoid that the engine of the car always works at full load,. The power steering systems conventional, that use hydraulic pumps driven by the

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vehicle's engine, have the limit to maintain the pump always active, resulting in waste of energy; furthermore, the pump operates more eciently at high speed, when it is required less assistance. A rst evolution involves the use of an elec-tric motor dedicated to the steering system to ensure the appropriate hydraulic pressure, while the motor is required only the servo power. Already this hybrid system requires to the motor vehicle less work and therefore results in lower fuel consumption. The next evolution involves the complete replacement of parts mechanical with an electric motor that directly assist the steering axis and in that way, next to the consumption further reduced, also decreases the necessity of maintenance. Power steering is only one of many possible examples: an elec-tronic system can adjust the fuel injection and the gearbox, check the brakes and suspensions, mechanisms and rollover air bags, which are now endowed with intelligence enough to understand when and how their use is appropriate (avoid-ing example to intervene if they recognize the presence of children). And yet, the electronics measures the tire pressure, ensures an integrated environment and manages the opening and automatic closing of doors. It's more frequent the presence of proximity sensors and the use of electronic keys. The condition-ing circuits play an extremely important role in determincondition-ing the performance of the control system of the car. Basically sensors and actuators are the two major categories into which these stand out. The amount of them in a car is very high, easily now in the car category medium-high is reached eighty units, impressive when you consider that in a common house usually does not exceed the amount of fty engines. It is therefore essential to have appropriate electronic control circuits, which will ensure high levels of reliability and accuracy. Electronic controls for motors inside the car can be found in the automatic positioning of rear-view mirrors and seats, with the purpose to adapt them to the necessity of dierent drivers in the drive, the wipers in case of rain, which is also automat-ically adjust the frequency, the opening and closing of windows and roofs, as well as that, as already mentioned, in the brake system, in the power steering and in plants of air conditioning.

1.3 Requirements and working conditions

The electronics intended for motor vehicles must take into account many com-promises such as reduced cost, compact size, high levels of robustness, reliability and quality. The requirements in the automotive sector are almost stricter than military requirements, and moreover there is the fact that it is a eld by high production volumes at low cost. An electronic product used inside a motor ve-hicle is often designed to work in a hostile environment, in extreme electrical conditions and subjected to considerable mechanical stresses, and must therefore possess some indispensably features:

• Over-voltage protection • short circuits protection • protection to reverse polarity

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• protection to electromagnetic interference

• protection to extreme temperatures (must remain ecient in a range of temperatures from -40 ° C up to 160 ° C, considered to be the values that can be achieved in an engine compartment)

• resistance to shock and vibration • resistance to water, oil, fuel and dust.

For these reasons the design of automotive integrated circuits is a dicult chal-lenge: designers have to take care of a huge number of requirements, considering many trade-o between costs, area and robustness to harsh environmental and electrical operating conditions. Indeed, automotive grade ICs have to guarantee their functionalities over the operative range of supply voltages and temperature satisfying very stringent requirements.(See table 1)

Parameter Consumer Automotive

Temperature 0 to 40°C -40 to 150°C

Maximum Voltages 3.3 to 5V > 70 V

Power < 5W up to 100W

Operation Time 1-3 years up to 25 years

Humidity low 0% to 100%

Tolerated Field Failure Rate <1000 ppm Target→ 0 defects

ESD 4-8 kV 4-8 kV IC levels

Table 1: Consumer vs Automotive IC Requirements

A particularly critical aspect is connected to over-voltages, since the supply voltage of a motor vehicle may be subject to variations (often short) also very high. In principle, within a car, electrical energy is generated by means of an alternator, which receives mechanics energy from the crankshaft; this alternator is followed by a specic regulator, that provides to straighten and stabilize the output voltage. The latter, in addition to recharge the battery, bias all the electrical loads on board the vehicle. Cause to the inductive nature of a large part of these loads (such as motors), their shutdown inevitably causes transient phenomena in the electrical system, that can last a few milliseconds before the regulator is able to restore the nominal conditions. Another situation, which occurs quite frequently, is the temporary disconnection of the battery, typically due to some problem of contact of electrical connections: since the alternator itself has an inductive nature, the sudden interruption of the charging current of the battery causes a temporary over-tension, which can reach 40 V for a few milliseconds. The electronic system board must be able to withstand the abnormal condition without any damage and must ensure its functionality, at least regarding most critical applications such as those of safety. For this purpose they have developed power technologies able to operate with the maximum attainable voltage supply. Since an always more push integration of electronic

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systems (preferably on a single chip)is demanded, the technologies that today in automotive come up are those that associate, for reliability and resistance, reduced overall dimensions as possible.

1.4 Development of technology

Since the invention of integrated circuits with the introduction of planar tech-nology, at the beginning of 60s, the microelectronics industry has grown at an impressive rate, the increasing of the capacity of integration in the last forty years is amounted to about eight orders of magnitude. This allowed to reduce the size, the consumption and the costs of many products, improving perfor-mance and reliability. In the 80s ASIC (Application Specic Integrated Circuit) made his rst appearance: As the name indicates it consists of non-standard components and therefore not available in the catalog, but custom-designed for a precise statement of the customer's particular application. The advantages of ASIC, of course obtained by a greater xed cost of the project, are varied and respond to the necessity of the market: the ASIC solution allows, rst of all the reduction of the physical dimensions of the system (both in terms of size and weight), since only one chip can replace a large number of standard devices. The decreasing of the amount of connections and welds gains in terms of relia-bility. The smaller physical size of the system cause a reduction of the parasitic components, and consequently, a lower power dissipation. The reduced number of components ultimately limits the unit costs and the latter is crucial in order to maintain a competitive product on the market, especially when production volumes are remarkable. In general, an electronic system can be partitioned into dierent blocks, according to the function performed, the complexity required and the power involved, typically are distinguishable:

• Part of the analysis and control • Input interfaces

• Supply interfaces • Output interfaces

Due to the dierent and conicting necessity of the various parts, traditionally, all these functions was distributed over a huge number of integrated circuits, each made with the technology best suited to the task required (for bipolar interfaces input, CMOS for the processing part, a power technology for the interfaces of supply and output). Considering the excellent integration level now reached, the new trend market in recent years is instead summarized in the expression "system-on-chip," which wants to show the will to enclose an entire system in a single integrated circuit, often also including sensors and actuators. The automotive industry in particular, for cost, size and reliability reasons already mentioned, leads strongly in the direction of the integration of all contemporary traditional components of electronics (digital, analog, power) within a single circuit. At the same time the complexity of systems grows at

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a dizzying rate. A very eective example is constituted by the regulator of the alternator, quoted in previous paragraph: since the rst accomplishments of discrete components, it was come to the current structure, fully integrated on a single chip and, in the course of this evolution, not only were improved performance on the basic function of the regulation of the voltage, but also were added numerous features, mainly diagnostics, that allow to reveal and manage abnormal situations, so that to increase signicantly the reliability of the product. In order to operate in the automotive electronics market is therefore essential to have cutting-edge technologies, allowing at the same time:

• High integration density (for the digital control)

• Good dynamic characteristics and sucient accuracy (for the analog part of acquisition)

• High current density and high breakdown voltage (to the power part of implementation)

An example of technology-oriented "system-on-chip" is for instance the BCD, of the STMicroelectronics. The name comes from the initials of the three classes of devices that can be integrated: bipolar, CMOS and DMOS, dedicated respec-tively to implement, in order, the three functions above, being, each one holder in particular of the corresponding characteristic. With the potential oered by new technologies is now possible to integrate many small systems on a single chip, or two, if you want the circuit more sensitive (typically to digital process-ing, low voltage) to be protected from the other, that complements the rest of the system. On this emerging trend, it was moved also the project carried out in this thesis, that uses a new technology developed by Austriamicrosystems, called H35. This is a 0,35 um CMOS technology high-voltage, which can oper-ate up to 50 V, with the additional possibility of extension. It is based on the basic process CMOS 0.35 um for low voltages, which represents an evolution, achieved through the inclusion of a few additional masks. Therefore constitutes a technology with low cost, but with performance similar to those of mixed technologies, such as the BCD cited above, which are much more expensive in comparison. It enables the integration of contemporary high voltage circuits and standard circuits at low voltage to ensure the same density integration of low-voltage technology, allowing to integrate on a single chip mixed-signal cir-cuits, which include also the digital part, exploiting the exceptional density of CMOS. The technology provides two levels of poly and from two to four levels of metal, with an optional layer of metal thick power for the last layer.

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2 H-bridge Motors

2.1 H-BRIDGE

An H bridge is an electronic circuit that enables a voltage to be applied across a load in either direction. It contains four switching element, with the load at the center, in an H-like conguration (Fig.3)

Figure 3: H-BRIDGE Circuit

The 4 switching elements, Q1, Q2, Q3, Q4, could be bipolar or FET tran-sistors or IGBTs in case of high voltage applications. The diodes, D1, D2, D3, D4, are called catch diodes and are in the mostly of cases a Schottky type. The top of the bridge is connected to the power supply and the bottom is grounded. There are some restrictions about the turning on and o of all the 4 switching elements. The load can be a brushed DC or a bipolar stepper motor (steppers need two H-bridges per motor) load in the highest part of the application. 2.1.1 Static Operation

The basic operating mode of an H-bridge is the following: if Q1 and Q4 are turned on, the left side of the motor it's connected to the power supply, while the right side is connected to ground. So a path is created for the current letting the motor to move in the forward direction (Fig.5). While when Q2 and Q3 are turned on, it means that the right side is connected to Vbat and the left side is connected to ground, so that, in this case in the reverse way the motor gets energized in the reverse direction, and the shaft will start spinning backwards(Fig.4).

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Figure 4: H-BRIDGE Backward Direction

Figure 5: H-Bridge Forward Direction

In a bridge, it's not allowed to close both Q1 and Q2 (or Q3 and Q4) at the same time. If this happens, it's created a low-resistance path between power and

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GND, short-circuiting the power supply. This condition is called `shoot-through' and leads to the destruction of the bridge, or in the worst case it can destroy other parts of the circuit.

Figure 6: H-BRIDGE Shoot Through Condition

Basically the purpose of the H-bridge circuit is the reverse of the polarity of the motor, but another way to use it is to brake the motor, where the motor comes to a sudden stop, as the motor's terminals are shorted, or to let the motor free run to a stop, as the motor is eectively disconnected from the circuit. The principal operations are summarized in the following table, with Q1-Q2-Q3-Q4 corresponding to the previous gure.

Q1 Q2 Q3 Q4 Result

1 0 0 1 Motor moves right

0 1 1 0 Motor moves left

0 0 0 0 Motor free runs

0 1 0 1 Motor brakes

1 0 1 0 Motor brakes

1 1 0 0 Shoot-through

Table 2: H-BRIDGE Principal Operation

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2.1.2 Simplied Motor Model

A DC motor is an energy conversion device: it takes electrical energy and turns it into mechanical energy. When operated as a generator, it does the opposite: converts mechanical energy into electrical. In this motor model, the mechanical parameters are completely ignored. On the electrical side, the motor basically contains a number of inductors, that move in a magnetic eld. The inductors themselves have an inductance, and some internal resistance. Their movement in the eld will generate a voltage called generator voltage and denoted by Vg across the inductors as drawn in Fig. 7.

Figure 7: H-BRIDGE Motor Model

In fact in many cases, the internal resistance of the inductors can be disre-garded, and a simpler model, an ideal inductor in series with a voltage source can be used:

Figure 8: H-BRIDGE Simplied Motor Model

In both cases, all the elements are in series, so they share the same current, but the voltage across them is dierent. The generator voltage (Vg) depends only on the speed by which the inductors move in the eld, in other words on the rotational speed of the motor. The force (or torque in a rotational system, like a DC motor) these electromagnets inductors exert is proportional to the current owing through them.

2.1.3 Catch diodes

In all real circuits it is impossible to turn on or o the high-side and low-side switches at exactly the same time. In that case, as it was said before, it happens that both the high-side and low-side switches are on for a short while. If both are on, it's created a low path resistance consisting in a shoot-through condi-tion. And this condition has to be avoided. It's necessary that the switches are o momentarily. So in design phase is important to make sure that the two switches, when biased, are never on at the same time, but as a consequence they will be both o for a short while during switching. When both switches are o on one side, the motor current has no path to ow, then the motor voltage will jump as high as it needs to create a path for the current to ow, destroying one

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of the switches. The catch-diodes have the purpose to provide a path for the current during these short switching periods avoiding that the voltage of the motor reaches too high values. In some implementations, the intrinsic diodes of the MOSFET switches are used as catch diodes, in others, for example when BJTs are used as switching elements, the diodes must be provided externally. There could be the possibility to use the catch diodes to conduct the o time current but in reality is not done cause of considerations about heat dissipation.

Pswitch= Vswitch∗ I = Rswitch∗ I2

Pdiode= Vf∗ I

As long as the current is lower than Vf/Rswitch, it's better using the switches

to conduct the o-time current. For most diodes Vf is in the range of 0.2 to 1V, while Rswitchis normally way lower than 100m. It's also much easier to lower

Rswitchthan Vf in case of problems of heat dissipation.

2.2 Control of the bridge

In the previous paragraph it's only considered static operation, when nothing was changing. But since in most applications a change of speed of the motor is wanted the switches are controlled with a PWM signal. It has two phases, the on-time and the o-time. See Fig. 9

Figure 9: PWM Signal

It is a periodic signal, with a constant frequency. In order to change the speed, it's used the information contained in it that is the ratio between the on-time and the o-time. The various drive modes dier in how the switches are set during the on-time and the o-time. There are 6 possible mappings :

Mapping 1 Q1 Q2 Q3 Q4

on-time state close open open close o-time state close open close open

Table 3: Mapping 1 18

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Mapping 2 Q1 Q2 Q3 Q4 on-time state close open open close o-time state open close open close

Table 4: Mapping 2

on-time state close open open close o-time state open close close open

Table 5: Mapping 3

on-time state open close close open o-time state close open open close

Table 6: Mapping 4

on-time state open close close open o-time state close open close open

Table 7: Mapping 5

on-time state open close close open o-time state open close open close

Table 8: Mapping 6

Mapping 3 and Mapping 4 correspond to Lock anti-phase drive while the remaining mappings correspond to sign magnitude drive.

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2.2.1 Sign Magnitude Drive Considering mapping 1:

on-time state close open open close o-time state close open close open

Table 9: Mapping 1

During the on-time, Q1 and Q4 are closed. This means that, as it's said before, the left-side of the motor is connected to Vbat, while the right-side is grounded. Current can ow from the supply through the motor:

Figure 10: H-BRIDGE Sign Magnitude Drive 1

Q1 and Q3 are closed during the o-time, but Q4 it's opened. In this state, there's no path from the supply to ground through the bridge. However, there is a path indicated in blue in the gure, in which both of the motor terminals are connected to the battery voltage, short-circuiting the motor. So in the situation in which there was current owing through the motor at the time the switch-over happened, that current can continue circulating around that loop:

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Figure 11: H-BRIDGE Sign Magnitude Drive 2

In the following gure the waveforms of the switches resulting in the bridge are illustrated:

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Figure 12: H-BRIDGE Sign Magnitude Drive Waveforms 22

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The average voltage that the motor sees can be calculated as the following: Vmotavg = Vbat∗ ton/tcycle where tcycle is the cycle time, and ton+ tof f =

tcycle.

So with this mapping it is realized the forward direction. With the same method using mapping 5 it's possible to realize the backward direction. Then, In order to make a functional H-bridge, it's necessary to employ both of these mappings and introduce a control signal that can choose between the two. This is the origin of the name of the drive mode: one controls the signal, the one that chooses between the two mappings, that is used to determine the `sign' of the voltage applied to the motor, while the other the PWM signal is used to determine the `magnitude' of that (average) voltage. Considering the other two mappings, mapping 5 and mapping 6, there is only a slightly dierent from the previous two: the dierence is the following: during the o-time, the two low-side ones are turned on, instead of the two high-side switches,. This leads to the fact that the motor terminals are both connected to ground instead of the battery, but they are still shorted together and the motor current still circulates inside the bridge during the o-time:

Figure 13: H-BRIDGE Sign Magnitude Drive 3 2.2.2 Lock Anti-Phase Drive

When the bridge is driven in lock anti-phase mode, the state of the four switches (Q1, Q2, Q3, Q4) is mapped the following two possible ways to the PWM control signal:

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Mapping 3 Q1 Q2 Q3 Q4 on-time state close open open close o-time state open close close open

Table 10: Mapping 3

on-time state open close close open o-time state close open open close

Table 11: Mapping 4

It's easy to see that the two modes are identical when it's applied a PWM signal, with reversed duty-cycle . Because of that, It will be considered only mapping 3. This popular drive mode turns all four FETs of the bridge on and o in every cycle. The diagonal pairs are driven in pair. So, considering mapping 3, for the rst part of the cycle Q2 and Q3 are on, and for the second half, Q1 and Q4 conduct. The two sides (side-A and side-B) are always driven in opposite ways, they're in `anti-phase' from the others. That's where the name of the operating mode comes from. In this conguration, if the two diagonal pairs are on for the same amount of time, in other words the bridge is driven at 50% duty cycle the average voltage on both terminals is Vbat/2, and the average

voltage across the motor is 0:

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The system is in idle condition, the voltage across the motor's terminals it's 0. In this condition the motor is not moving. If for example the duty cycle is decreased, Q2 and Q3 are on longer than Q1 and Q4 are. So in this case the average voltage on the A side of the motor is higher than on the B side, so it starts spinning in the backward direction:

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In the other situation, when the duty cycle is increased above 50 %, con-versely, the average voltage of B side is higher than A side, so the motor is moving in the forward direction. The average voltage on the motor terminals is:

Vmotavg= Vbat∗ (ton− tof f)/(tcycle)

2.3 H-bridge Design

H-BRIDGE design phase starts with the analysis of high level design parameters and than with the choice of suitable elements for the application wanted. 2.3.1 High Level _Design Parameters

The most important high level design parameters are: 1. The maximum operating voltage (Vbat) of the bridge.

2. The maximum (average) motor current that the bridge needs to handle. 3. The drive mode of the bridge.

4. The switching frequency of the bridge.

The rst two points are xed when it's considered the particular application or motor to drive. The drive mode is a complex problem and it's not analyzed in this work. Considering the point 4. The ripple current (Iripple_max) is directly proportional to the period of the PWM signal. So when the operating frequency increases, the ripple current decreases. Generally it's wanted a low ripple current because it stresses components, reduces eciency (additional loss on various resistances on wires, connectors, switching elements etc.) and generates EMI noise. But the switching frequency is directly proportional to the switching losses on the bridge, and they could start to be a signicant source of heat. This lead to a limit on the increasing of the switching frequency. As the switching frequency increases, it's necessary to turn the switching elements on and o faster enough to minimize the above mentioned switching loss. That makes the drive circuit design harder as well as make the circuit more `noisy', emitting more EMI radiation. Analyzing the commercial solutions of the most important electronics company a switching frequency of 20-40kHz is a good compromise between these requirements for most designs.

2.3.2 Switching Elements MOSFETs

The choice of the switching elements plays an important role in an H-bridge design. There are many factors to be considered, the most important ones are the operating current, the operating voltage and the switching frequency. For high-voltage applications of several hundred volts IGBTs are often chosen and also some bridges use BJTs, however the vast majority of the modern designs

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use MOSFETs, so for the rest of the work It will be analyzed MOSFET switch-ing elements. MOSFETs, when operated as switches, can be considered have two states: on and o. In the on state they are approached to a small resistor, and their resistance is denoted by rdson. The higher this value is, the higher the losses are on the MOSFET, and the higher losses lead to higher heat. This is a great problem and it's necessary to be dissipated. So a lower rdson is bet-ter. Considering which MOSFET technology to use: `N'-channel or `P'-channel MOSFETs. `N' channel MOSFETs have a much lower rdson than P-MOS so they are desirable for their lower losses. For the low-side switches (Q2 and Q4) they are the obvious choice. For the high-side switches (Q1 and Q3) is more complicated. For N-channel devices, they need to work, in a way that their drain is at a higher potential than their source (otherwise their body-diode would open). So, when operated on the high-side, their source is connected to the motor terminal, and their drain is connected to the power supply:

Figure 16: H-BRIDGE NMOS Switching Elements

This means that their source terminal potential can reach all values between ground and Vbat. Turning the FET on, their gate should be (depending on con-struction and devices) 3-12V higher than their source. At the same time,there is a limit to the maximum gate sources voltage allowed on the MOSFETs. If the gate source voltage is more than approximately 20 volts the FET will be destroyed. This means that in order to properly and safely turn on a high-side N-MOSFET, it's necessary a varying of the gate-voltage that is potentially higher than Vbat.. This means that this requirement complicates driver design.

P-channel devices don't have this problem because their source is connected to the battery , while their drain is connected on the motor terminal.

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Figure 17: H-BRIDGE PMOS Switching Elements

To turn them on they need a negative 3-12V on their gate compared to their source, so the gate voltage is obviously always below the battery voltage and there is no necessity of monitoring the motor terminal voltage to be kept within safe limits. P-channel devices always have a higher rdson and the on and o time is higher than NMOS. This aggravates dynamic loss problems. and can complicate shoot-through protection. Substantially the usual trade-o is that for applications not much demanding P-MOSFETs are selected for high-side operation if it's tolerable the value of the rdson, losses are manageable and the advantage is that they require much simpler drive circuitry. For high-current applications N-channel devices are a better compromise as P-FETs with compa-rable rdson are either not available or extremely expensive making it reasonable to spend some extra money on the drive circuit.

2.4 Gate Driver

The drive circuitry for an H-Bridge is basically the electronics that sits between the PWM digital control inputs and the MOSFET gates. It has to drive safely and properly the MOSFET gates translating the input voltages to suitable lev-els and it has to provide enough current to charge and discharge the gates fast enough to avoiding shoot-through problems. It could be additional function such as provide additional safety functions, like over-current protection or be compatible with a particular drive mode. There are several types of gate-driver. Referring to the gure ,there are high-side drivers that drive Q1 or Q3. Half-bridge drivers that drive one low-side and one high-side driver, so for example they can drive Q3 and Q4 (or Q1 and Q2) together. There are low-side drivers, that are designed to drive Q2 or Q4 on the bridge. Full-bridge drivers that can drive all four FETs, having two low-side and two high-side drivers. As discussed before, high-side driver can be either P-channel or N-channel devices,while on the low-side MOSFETs there are always N-channel ones.

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2.4.1 The Complementary CMOS Driver

The most used gate driver circuit is the complementary CMOS driver.

Figure 18: H-BRIDGE CMOS DRIVER

The PMOS and NMOS provide a clean digital logic output. When the gates of the FETs are connected to VCC, the high-side PMOS is o while the low-side NMOS is on. If the gates of the FETs are grounded the opposite happens, so, the low-side NMOS is o, while the high-side PMOS is on, so the output is connected to VCC. The dierences between this driver circuit and one side of an H-bridge are the smaller gate capacitance and a much higher rdson value of the driver circuit. It leads to a quick time of charging and discharging of the gate and to a dynamic shoot through lower. The gate capacitance of the MOSFETs together with the available drive current from the drive circuit will determine how fast the transistor can be turned on or o. This has particular consequences in heat problems because low turning on or o time reduces heat dissipation on the MOSFETs and it's possible to realize more precise PWM control of the motor. On the other hands, fast transients generate a lot of EMI noise, need higher current drivers and the faster the transient time is, the faster the catch diodes need to be.

2.4.2 Low-Side Driver

As it was said before, on the low-side, because of the lower rdson it's always used N-channel MOS. They need an higher voltage (typically 5-15V ) to turn the power MOS of the bridge safely fully on and a low voltage to turn it o.

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Figure 19: H-BRIDGE Low Side Driver 2.4.3 High Side Driver

For the high-side driver the voltage level needed to the gate-drive is not within the range (3.3-5V) of standard digital logic. In this case at least a level-shifter is necessary in order to be able to drive the device. Considering a P-MOS transistor as driver, it is open (non-conducting) when its gate is at close to the same potential as its source, and closed (conducting) when the gate is at a signicantly lower potential, -5. . . -15V lower. This means that in order to completely turn o a high-side P-FET it's necessary to drive its gate as high as its source, which is connected to the power supply. To turn the FET on, we have to lower the gate voltage by 5. . . 15V below VBAT. So it's necessary to power the driver stage from the same voltage as the bridge is operating on, that is VBAT. That way, the high-level output voltage will be VBAT, which will turn the P-FET o properly, and the low-level output voltage will be 0, that is almost always enough to turn the FET on. Finally, in order to avoid the gate-oxide breakdown of the MOS it's necessary not to overcome +-20 V of gate source voltage tension. This is usually accomplished by adding a Zener diode to the output and set the Zener voltage to about 15V. With all the complexities of level-shifting and voltage-limiting, P-MOS drivers are still simpler than drivers for an Nchannel device. The source of an N-channel device on the high-side has to be connected to the motor terminal and its drain to the power supply, otherwise the body-diode would be forward-biased and would always conduct. To turn o an N-MOS device in that conguration, the gate has to be connected to ground or to VBAT: gate-source voltage is going to be below or equal to 0. But it's not enough to open the device since its source and drain are roughly at the same potential. As the drain is connected to power, the source will be

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at that level as well, but than gate should be higher than that to keep the device open. It was seen that the gate should be at minimum 4.5V higher. As Vbat is usually the highest voltage directly available in a system, this voltage needs to be generated. In most cases some kind of a charge-pump is used for that generation, so the complexity is increased. Except for this NMOS are preferable for their lower rdson that mean lower heat dissipation.

Figure 20: H-BRIDGE High Side Driver

2.5 Safety features

Integrated diagnostics provide indication of under-voltage, over-temperature, and power bridge faults. This paragraph will present the principal safety fea-tures of the modern H-BRIDGE and will report some safety feafea-tures taken from datasheet of the principal electronic companies.

2.5.1 Over-temperature detection

Detecting an over-temperature condition is became of primary importance in the modern devices. For example, if the FETs heat up, their channel resistance increase its value. If the condition keep going and they still delivering the same current because of closed-loop current-control for example the increased re-sistance will lead to an always more increasing of the heat-dissipation, which in turn will cause that the FETs will heat up even more. This positive feed-back consequently will over-heat and destroy the bridge. In the A4910 datasheet of ALLEGRO Microsystem there is an internal temperature-to-voltage converter that provides a measurement of the surface temperature of the silicon. Two temperature thresholds are provided: a hot warning, and an over-temperature

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shutdown. In the rst case circuitry not will be disabled and action must be taken by the user to limit the power dissipation in some way to prevent over-temperature damage to the chip and unpredictable device operation. In the second case, all gate drive outputs will be disabled automatically.

2.5.2 VDS MONITOR

Monitoring the drain-source voltage of the power mos of the bridge it is possible to have shoot through protection. It is also used to check if the 4 power-mos are working in the right work region. If someone goes out from linear region the rdson increases with a great increasing of heat dissipation. The DRV3201 of TEXAS INSTRUMENT provides a drain-source voltage monitoring feature for each external power MOSFET. The internal VDS threshold for the VDS monitoring can scaled in eight steps.

Figure 21: DRV3201 Vds Monitor

The VSH pin is used as sense input voltage for the high-side VDS compara-tors. In the A3942 of Allegro Microsystem the block-diagram is shown in gure 22

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Figure 22: A3942 VDS Monitor

It realizes the Short to Battery, Short to Ground and Open Load Protection. In the rst protection if the Sx pin voltage exceeds the VDS threshold voltage for that channel, an STB fault is latched. The output for that channel is disabled until the fault is either cleared. During the Open Load Protection, a small bias current, IOL , is sourced to the Sx pin of the channel. There it divides between RSx and the load. If the load is open, the Sx voltage will rise above the OL fault detection threshold. In that case, the output is disabled until the fault is cleared. Finally in the Short to Ground Protection, The voltage from drain to source for each MOSFET is monitored. An internal current source sinks IDx from the Dx pins to set the VDS threshold for each channel. If the MOSFET gate to source voltage exceeds the VDS threshold, then a fault will be registered for that channel, the MOSFET gate will be discharged, and the fault pin will be set low.

2.5.3 Current Detection

It's possible to measure the current through the load (the motor), or through the bridge itself. In the rst case the current sense element needs to be put in series with the load:

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Figure 23: H-BRIDGE Current Detection Rsense in series with the motor

In the second case there are two possibilities:

• High side sense resistor, resistor between the motor and the battery. • low-side sense resistor, resistor between the motor and the ground.

Figure 24: H-BRIDGE High-Side and Low-Side Sense Resistor 36

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First of all the value of the sense resistor should be very low in order to keep power dissipation low, but high enough to generate a voltage detectable by the sense amplier, within the accuracy desired. This dierentially sensed signal across the sense resistor rides on a common-mode voltage, which for low-side sensing is close to ground (0V), but for high-side sensing is close to the supply voltage. The input common mode range for the measuring amplier should thus include ground for the low side, and the supply voltage for the high side. In the rst case there are several down-sides. First, the asymmetry of the circuit,in which when a short circuit conditions has to be detected, it will be problematic. For example, if the a-side is short grounded the current sensor will correctly see the high current peaks during the turn-on time of Q1. However if the b-side is short grounded at the same way, the current sensor is completely unaware of the problem. In addition of this other disadvantages are the impossibility to detect switching element failures and the high swing of the common mode voltage. Since the common-mode voltage for low-side sensing is close to ground, the current-sense voltage can be amplied by a low-cost, low-voltage op amp. Low-side current sensing is simple and cheap, not complex, but the down-side is the ground-path disturbance introduced by the sense resistor. Another ma-jor disadvantage of low-side sensing is that short-circuit currents resulting from accidental shorts between the battery and ground go undetected. Despite such issues, however, the simplicity and low cost of low-side sensing makes it attrac-tive for applications in which short-circuit protection isn't necessary, and where ground disturbances can be tolerated. High-side current sensing as it's said above it's accomplished by placing the sense resistor on the high side, between the supply voltage and load. Not only does this placement eliminate the ground disturbances found in low-side sensing, it also allows the detection of accidental battery shorts to system ground. High-side sensing, however, demands that the sense amplier handle a common-mode voltage that is close to the supply volt-age. This common-mode voltage can reach more than hundred volts (depending of the application) and this means more complexity and more cost.

Below is reported a table in which there are a summarized datasheet regard-ing current detection of several H-bridge motor driver. The characteristics dier in terms of typology, complexity, features.

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2.5.4 Under-voltage protection

Under voltage protection is also necessary. With low voltages battery it can happen that there could be too low Vgs voltage in the driver circuit, which in turn might not close the MOSFETs enough, this could led in a not right work region increasing their on-resistance and than heat dissipation. If the low voltage is the result of a drained battery, it is also accompanied by increased internal resistance of the battery. Detecting low voltages is relatively simple, many driver circuits already include UVLO (under-voltage lockout) circuitry. The A4910 of Allegro Microsystem contain this function. Its logic supply voltage at VDD is monitored to ensure correct logical operation. If the voltage on VDD drops below the VDD under-voltage threshold, VDDUV , then the logical function of the A4910 is not guaranteed and the outputs is immediately disabled. The A4910 will enter a power-down state and all internal activity, other than the VDD voltage monitor, will be suspended. When the voltage at VDD rises above the rising under-voltage threshold, VDDUV + VDDUVhys , the A4910 will perform a power-on reset restoring a correct functionality.

2.5.5 Over Voltage Protection

There are 2 kind of over voltage situation: permanent and transient. Permanent over-voltage situations on the battery often can result from misconguration or misuse. Transients voltage spikes can derive from many sources. On the battery side high voltage spikes can essentially derive from the H-bridge. They can be during turn-on and turno of the switches, when there's a short period when neither the FETs nor the catch diodes conduct, due to the internal capacitance of the diodes. They can be also generated by the motors themselves due to commutation. Eective protection against them is important, as these spikes can easily destroy the power MOSFETs. Two solution are generally adopted: a low-pass lter that lters out the high-frequency content of the spike and adding a capacitor in parallel with the motor or to the input of the bridge.

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Figure 25: H-BRIDGE Over Voltage Protection 2.5.6 Inverse Battery Protection

The problem is the following: when the battery polarity is reversed, all four catch diodes are forward-biased. This condition creates a low resistance path for cur-rent to ow through the bridge, short-circuiting the battery. Even worse, this large current will ow though the diodes which have a relatively high voltage-drop. This results in a generation of a great heat , and in the destruction of the power devices. So a valid protection is needed to avoid these problems.

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3 Current measurement

3.1 error gain in a dierential amplier

Dierence ampliers are common in many circuits. One of their applications is the motor control circuits in automotive systems. Its output voltage is propor-tional to the dierence of the two input signals.

Figure 26: Inputs and output of dierence amplier circuit

The dierence amplier is very important because of its ability to take signals dierentially from lines or sensors subject to common mode voltages . It's able to cancel the signal common to both inputs. Resistor matching and tight resistor tolerances are extremely important in increasing the error gain of a dierence amplier circuit. Amplier DC performance is aected by a variety of Op Amp characteristics. The purpose of this analysis is to develop a complete expression in order to analyze the DC performance of a dierential amplier including the eect of oset voltage,oset current and bias current. An accurate assessment of performance over a wide range of conditions will then be possible. The two amplier input terminal currents will be labeled Iminus and Iplus .

Figure 27: Dierence Amplier Circuit By superposition theorem:

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V4= Vin6 R2 R1+ R2 + Vout R1 R1+ R2 − Iminus    1 1 R1 + 1 R2    EQ.1

Iminusit's dened as positive when it ows into the Op Amp negative input

terminal. V5= Vin8 R4 R3+ R4 - Iplus     1 1 R3 + 1 R4     + Vof f EQ.2

Iplus it's dened as positive when it ows into the Op Amp positive input

terminal.

Vout= − (V4− V5) GEQ.3

Gis the open loop gain of the Op Amp Ibias=

Iplus+ Iminus

2 Iof f = Iminus− Iplus It was dened the oset current to be positive when it results from a current Iof f

2

that ows into the Op Amp negative input terminal and out of the positive in-put terminal. H = R1 R1+ R2 Therefore 1 − H = R2 R1+ R2

His dened as the gain from Voutto V4with all other voltage sources shorted

and all current sources open. V4= Vin6(1 − H) + VOU T(H) − Ibias+ Iof f 2    1 1 R1 + 1 R2   EQ.4

Eective voltage at the Op Amp inverting input after the substitution of expressions involving H, Ibiasand Iof f.

V5= Vin8 R4 R3+ R4 − Ibias− Iof f 2    1 1 R3 + 1 R4   + Vof f EQ.5

Eective voltage at the Op Amp non-inverting input after the substitution 42

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of expressions involving Ibiasand Iof f

Vout= −

"

Vin6(1 − H) + Vout(H) − (Ibias+

Iof f 2 )    1 1 R1 + 1 R2   − " Vin8 R4 R3+ R4 − Ibias− Iof f 2    1 1 R3 + 1 R4   + Vof f ## G Substituting EQ. 4 and EQ. 5 into EQ. 3

Vout = − " Vin6(1 − H) − Vin8 R4 R3+ R4 + Vout(H) − Ibias " 1 1 R1 + 1 R2 ! − 1 1 R3 + 1 R4 !# −Iof f 2 " 1 1 R1 + 1 R2 ! + ₁ 1 R3 + 1 R4 !# − Vof f # G Collecting terms involving Ibiasand Iof f

Vout= − " Vin6(1 − H)−Vin8 R4 R3+ R4 −Ibias " 1 1 R1 + 1 R2 ! − ₁ 1 R3+ 1 R4 !# − Iof f 2 " 1 1 R1 + 1 R2 ! + ₁ 1 R3 + 1 R4 !# − Vof f # G 1 + GH Collecting terms involving Vout

Vout= − 1 − H H _GH 1 + GH Vin6+ 1 H _GH 1 + GH Vin8 R4 R3+ R4 + 1 H _GH 1 + GH " ₁ 1 R1 + 1 R2 ! − ₁ 1 R3 + 1 R4 !# Ibias+ 1 H _GH 1 + GH       1 1 R1 + 1 R2   +    1 1 R3 + 1 R4       Iof f 2 + 1 H _GH 1 + GH Vof f

Rearranging the expression so that the right-hand side is a summation of expressions that involve each of the signals applied to the amplier. This is one step closer to the desired nal form of the gain equation. Resolving the two input voltages into common mode and dierential mode components: One half of the dierential mode input voltage plus the common mode input voltage

Vin6= Vin6− Vin8 2 + Vin6+ Vin8 2

Minus one half of the dierential mode input voltage plus the common mode input voltage

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Vin8= −Vin6− Vin8 2 + Vin6+ Vin8 2

substituting these terms into EQ. 6: Vout= − 1 − H H _GH 1 + GH Vin6− Vin8 2 + Vin6+ Vin8 2 + 1 H _GH 1 + GH −Vin6− Vin8 2 + Vin6+ Vin8 2 _R 4 R3+ R4 + 1 H GH 1 + GH " 1 1 R1 + 1 R2 ! − ₁ 1 R3 + 1 R4 !# Ibias+ 1 H _GH 1 + GH       1 1 R1 + 1 R2   −    1 1 R3 + 1 R4       Ibias 2 + 1 H _GH 1 + GH       1 1 R1 + 1 R2   +    1 1 R3 + 1 R4       Iof f 2 + 1 H _GH 1 + GH Vof f

Now it's collected the terms associated with the common mode input volt-age and those associated with the dierential mode input voltvolt-age. This put the expression in a particular version of standard form that is a very low entropy expression that brings out the relationships that drive performance.

Vout= − 1 H GH 1 + GH R4 R3+ R4 + 1 − H H GH 1 + GH 1 2(Vin6− Vin8) + 1 H _GH 1 + GH _R 4 R3+ R4 − 1 − H H _GH 1 + GH Vin6+ Vin8 2 + + 1 H _GH 1 + GH       1 1 R1 + 1 R2   −    1 1 R3 + 1 R4      Ibias+ 1 H _GH 1 + GH       1 1 R1 + 1 R2   +    1 1 R3 + 1 R4       Iof f 2 + 1 H _GH 1 + GH Vof f

Examination of this last expression reveals that the output is again expressed as the sum of several terms. The rst of these terms is a function of the desired dierential input signal, that it's wanted in the functionality. The second is a function of the common mode input signal and the remaining terms are functions of undesired parasitic inputs (input voltages and currents that are generated by the Op Amp). All these eective inputs (not considering the actual intended dierential input signal and the common mode input signal) were arranged so that the gain expression is recognized as being in the standard non-inverting

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format. Observing this expression appears clear that each term on the right is composed of an expression that assumes innite Op Amp gain times a correction term

GH 1 + GH

that contains Op Amp gain eects. The two terms involving currents also include an equivalent resistance to convert the current to a voltage. A deeper examination of these resistance terms shows that the coecient of Ibias

is the dierence between two resistances while the coecient of Iof f is the sum

of these two resistance terms. The term containing R1 and R2 is the parallel

combination of these two resistances and the term containing R3 and R4 is the

parallel combination of these two resistances. It's can quickly recognize these terms as the Thevenin equivalent resistance attached to the two Op Amp inputs. An excellent thing happens when the two Thevenin equivalent impedance are set equal to each other. The term involving Ibias is now multiplied by 0 and

disappears. Then the error term containing the currents is reduced to one containing only Iof f which is usually much smaller than Ibias. This explains

the reason for matching the impedance at the two Op Amp inputs.

3.2 Customer specication

The customer provide us the current application circuit and component param-eters. The current application circuit contains:

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Figure 28: Sense Resistor • Current sensing amplier:

Figure 29: Current Sensing Amplier

The application circuit is made by discrete components: the Op Amp OPA2365AQ-DRQ1, the 4 resistors of the Op Amp, R463 and R464 of 1 Kohm with a tolerance of 0.1% and R580 and R469 of 10 Kohm with the same tolerance, the current sensing resistor of a value of 10 mohm. The purpose is to use the information

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to estimate the error of current application and to suggest a solution which matches the current error. Reading the datasheet of the Op Amp it was taken its oset voltage and its input bias current and it is prepared a test bench in cadence to estimate the error gain Fig.30.

Figure 30: Test Bench

The result of the simulation it was compared with the formula of error gain previously obtained and it was considered a time switching < 300us.

From the characteristic of the internal comparator given by the customer it was taken the oset voltage that is shown in Table 12.

Parameter Min Typ Max Units

oset -5 - 5 mV

Table 12: Oset Specication of the internal comparator

3.3 Solution considered

Considering the results, two solutions were taken in consideration: • Op Amp PMOS + Comparator

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Figure 31: Current Sensing Amplier + Comparator • NMOS Comparator with source inputs

Figure 32: Comparator

The rst one has two stadium, so more complexity. It has the advantages to have signal amplication, it means that it has the output signal connected with the input of the comparator several times higher than the voltage on the sense resistor. This way facilitates the realization of the comparator with thresholds high enough to a correct comparison. But it amplies also the errors given by the tolerance of resistors that as we seen before they could be very strict. Furthermore,it's very dicult to make the tolerance of the resistors very low in an integrated circuit, their dimension could be very high and they need a perfect matching. In addition to this the contribute of the oset is double, one derives from the Op Amp, the other from the comparator.

The second solution is quite bit dierent. It has no signal amplication, so the comparator must be able to handle with low voltage/current inputs. It has one contribute of oset voltage, this helps to stay within a threshold. Finally the architecture is simpler than the rst one, there is only one stadium.

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3.4 Solution adopted

Considering the advantages and defects of each of the two possible architectural solutions, it was chosen the second one that is the comparator with the inputs on the source.

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3.4.1 Comparator N-source input The comparator is illustrated in the gure:

Figure 34: Comparator N-Source Input

The transistors M3 and M4 provide the bias current I0. (in the operative point) (V1=V2=0) is VGS1 =VGS2 = V and, since IDS1 = IDS2 = I0, the out-put voltage VU (in the operative point) (or in any case with dierential signal

null input) is equal to the voltage on node VK.

VU = VK = V GS1 = VT +

r 2I0

β

Since the transistors M1 and M2 are identical and have the same polariza-tion (and so well as M3 and M4), we dene:

gmn= gm1= gm2 gmp= gm3= gm4 rds= rd1= rd2 rdp = rd3 =

rd4

The principle of operation of the circuit is very simple, it is possible to repre-sent the Norton equivalent, going to calculate the output current of short circuit, and output resistance. Assuming that all the transistors work in saturation and assuming that the mirror M0, M3, M4 functions properly, the transistor M1 is biased with a current equal to I0 and its VGS is therefore xed, the application

of a voltage V1 to the emitter of M1 will vary the gate voltage of the transistors M1 and M2, which is equal to:

VG= V1+ VGS1= V1+ VT +

r 2I0

β

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The short circuit current of the output is the dierence between the current polarization and the current IDS2:

IU CC= I0− IDS2

It should be noted, however, that the calculation of Norton and short-circuit current must be made to the variations, which is:

Vg= V1 Iucc= −Ids2 Ids2= gmnVgs2,

But for small signals, the relation, where: Vgs2= Vg− V2= V1− V2

It follows:

Iucc= gmn(V2− V1) = gmnVd

Regarding the output resistance, it is simply the parallel of the two dier-ential resistance of the transistors M2 and M4, namely:

Rout = rdn//rdp

The dierential gain of this stage will be equal to Ad=gmn(rdn//rdp)

It's showed now what happens in practice, when, as in the specic case ap-plication considered, the emitter of M1 is xed to the ground and V2 represents the input signal Vin. If Vin is 0, the system is at equilibrium and it is seen that in this condition the voltage Output is equal to the voltage between the gate and source of the transistor M1, which is polarized with the current I0. Varying Vin, having placed the emitter of M1 to ground, the voltage the gate of M2 remains xed and constant. So, if Vin increases, the VGS of M2 inevitably be reduced, and, if we assume that the mirror M0, M3, M4 continues to work and M4 continues to pull a current equal to I0, then the voltage VDS2 will necessarily increase, whereas its operating point is moving on characteristics at lower VGS, while maintaining the same IDS.

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Figure 35: Characteristics of a MOSFET, which is deliberately accentuated the eect of modulation of the channel, in order to emphasize the dependence of the IDS-VDS in saturation

The output voltage, therefore, increases with Vin and the gain, in conditions of linearity of the circuit, was calculated previously. The behavior is similar, but inverse, if Vin decreases, instead of increasing: the output voltage in such a case will drop accordingly. The linear region of operation is one in which all the transistors work in saturation. It's clear that, with increasing Vin, the transistor M2 will stop conduct, because his VGS will no longer be sucient to turn it on. But when Vout decreases, the combined increase of VGS, because the output of M2 from saturation: the transistor enters the triode region, and for VDS very low, the output will be virtually equal to the input voltage. Therefore, the input-output characteristic of the circuit in question will have the trend illustrated qualitatively in the gure below.

Figure 36: Characteristic of the basic circuit of the comparator

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3.4.2 Current Mirrors

The circuit that realizes the thresholds is illustrated in Fig.37. It consists of several current mirrors each one with an enable NMOS that produce current thresholds, changed in voltage thresholds with the resistor R3 referring to Fig.34 .Since the thresholds are equally spaced it was sucient to provide every branch of the mirror with an enable, simplifying the control. The mirrors was realized with high channel length in order to minimize the oset.

Figure 37: Current Mirrors Circuit 3.4.3 Trigger Schmitt

Schmitt trigger is a comparator circuit with hysteresis. The output of a Schmitt trigger changes state when a positive going input passes the upper trigger point (UTP) voltage and when negative going input passes the lower trigger point voltage. The conventional Schmitt trigger has xed hysteresis width.

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Referring to Fig.38, When a voltage 0 is applied at the input, both M1 and M2 are o while M4 and M5 are ON and Vout3 is at high logic level. When the input reaches the threshold voltage of M1, it turns on , while M2 remains OFF and at this time output is still high, M3 is on and so also M1. It Tries to pull down the node between M1 and M2 while M3 try to pulls up this node to voltage VDD-VT , so transistor M2 keeps the output to HIGH logic level , now when the input rises up to the threshold voltage of M2 then output switches to low logic level, so eectively the switching point shifted to higher voltage referred as VIH. Similar in case when input is falling from higher logic level then PMOS`s do the same thing and switching point at output is shifted to some lower voltage referred as VIL. The dierence between the VIH and VIL is referred as HYSTERESIS voltage. This refers to an extra amount of voltage added to low logic level at output or subtracted to high logic level at output , the output logic level`s will remain same. If we examine the conditions from transistors (M1, M2, M3). When output switches from high to low just before that M2 is in o condition and M1 and M3 are in saturation condition.

IDM 3= β3 2 (VGS− VT H3) 2 = β3 2 (VDD− (VIN− VT H2) − VT H3) 2 = β3 2 (VDD− VIN+ VT H2− VT H3) 2 But VT H2= VT H3 IDM 3= β3 2 (VDD− VIN) 2 IDM 1= β1 2 (VGS− VT H1) 2 = β1 2 (VIN− VT H1) 2 IDM 1= IDM 3

Both are in saturation β3 2 (VDD− VIN) 2 =β1 2 (VIN− VT H1) 2 β3 2 (VDD− VIN) 2 =β1 2 (VIN− VT H1) 2 VIN= VDD+ VT H1 r β1 β3 1 +r β1 β3

This Vin is called VIH. Now Similarly for the VIL. Transistors M4 and M6, will be in saturation. IDM 6= β6 2 (VSG− |VT H6|) 2 =β6 2 (0 − (VIN− VT H5) − VT H6) 2 But 54

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VT H5= VT H6= β6 2V2 IN IDM 4= β4 2 (VSG− |VT H4|) 2 β4 2 (VIN− VDD− VT H4) 2 IDM 4= IDM 6

Both are in saturation β6 2V2 in = β4 2 (VIN− VDD− VT H4) 2 _V IN= r β4 β6 (VDD− |VT H4|) 1 +r β4 β6 ' VIL

The reason of using a Schmitt trigger in my design is in order to avoid static dissipation in the output stage. In order to avoid this power loss it was put the value of VIH and VIL of the Schmitt trigger equal to respectively 991.1mV and 1.005mV. Another purpose of the trigger in my design is to clean the low and high level of the output.

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3.5 Simulations and results

In Fig. 39 it's shown all the Vouts in temperature, process, threshold, power voltage variations, considering all the operative limits.

Figure 39: Transient Response of the low-side comparison in temperature and process variations

It was measured the Max switching time in the worst speed corner that was 231ns, respecting the specication that was tswitch < 300ns

Finally Monte Carlo simulations were performed in order to evaluate the eect of mismatch on the switching thresholds. A proper sizing of transistors, in especially those that constitute the mirrors of the input stage, has led to a deviation of the thresholds, from their mean value, equal to = approximately 1 mV, which is a great result for the specic application, compared with the initial specication. The results of in these simulations are shown in Fig. 40-41 considering all the 16 thresholds.

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Figure 41: Montecarlo 8-15 58

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4 VDS Monitor cell

In this chapter it will be described the full project and the realization of the vds monitor cell. The rst paragraph introduces all the specication and the functionality of the cell, including the operative limits and the customer speci-cation. The second paragraph presents all the schematics of the cell describing the problems found and the solutions adopted. In the third paragraph will be the simulations and results showing the critical points. The fourth paragraph nally will present the layout of the cells.

4.1 Customer specications

Basically, the System has to sense a voltage, compares it with a threshold and translate the comparison in an output signal. Furthermore has to do it with 16 dierent thresholds selectable by 4 enable signals.

Firstly it was decided the operative limits that the system must have. The maximum and minimum battery voltages were xed, respectively, for 55V and 5V. The rst value was chosen in order to meet the specication in the auto-motive applications, while 5V as the minimum voltage in order to ensure the proper operation even when the supply voltage decreases, as happens in ignition phase of the engine of a motor vehicle. The maximum output current on the pins drain and source of the high-side power MOSFET was xed for 60 uA with the purpose to avoid an excessive voltage drop on the input of the cell that can cause a deteriorating of the value of the thresholds and a not correct function-ality. Furthermore the System must ensure the limits of the value thresholds given by the customer and showed in the tables below.

Min V 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9

Typ V 0.25 0.35 0.45 0.55 0.65 0.75 0.85 0.95

Max V 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1

% error 20 14.29 11.11 9.09 7.69 6.67 5.88 5.26 Table 13: Thresolds Specication1

Min V 1 1.2 1.4 1.6 1.8 2 2.2 2.5

Typ V 1.1 1.3 1.5 1.7 1.9 2.1 2.35 2.75

Max V 1.2 1.4 1.6 1.8 2 2.2 2.5 3

% error 9.09 7.69 6.67 5.88 5.26 4.76 6.38 9.09 Table 14: Thresholds Specication2

As it's showed in the table the are two critical points to be careful and are the 2.1V and 0.95V threshold voltage tension with a maximum error tolerated of 4.76% and 5.26% respectively.

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About the switching time, dened as the interval time between the crossing of the threshold value of the input signal (drain-source voltage tension) and the crossing of the output signal of the comparator of the 70% and 30% of VCC respectively for switching up time and switching down time, there is not a xed specication, and it is assumed to be 1 us.

The operative limits are summarized in Table

Parameter Min Typ Max Unit

Temperature -40 27 160 °C

Battery Voltage 5 27 55 V

Power voltage VCC 3 3.3 3.6 V

Output Current - - 60 uA

Switching time - - 1 us

Table 15: Operative Limits

4.2 Solution adopted

In this paragraph is described the solution adopted. The image below shows the block system.

Figure 42: Vds Monitor Top Schematic Circuit

- The Mirror_Threshold block is used to generate the current thresholds - The Op Amp_Band_Gap block generates the bias current for the mirror threshold block by a buered voltage reference on a certain resistance.

- The Resistor block switches the current thresholds in voltage thresholds and contain the resistor used to buer the band gap voltage

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- The comparator block compares the drain source voltage of the power mos with the threshold selected.

4.2.1 Thresholds control logic cell

Figure 43: Threshold Control Logic Schematic

This digital circuit has the function of enabler of the mirror's branches. It's provided of 4 inputs enable signal( en1, en2, en3, e4), a power down signal (PD) and a control for the hysteresis controlled by VOUT that is the output signal of the system. So in this way when VOUT is high the cell disables two branches of the mirrors decreasing the threshold of 100 mV (50 mV for each branch of the mirror). Here it's showed the table truth.

Analysis and design of VLSI cells for diagnostic and control of an H-Bridge for automotive application