Bibliografia
[1] Leland Chang, Yang_Kyo Choi, Daewon Ha, ed altri, “Extremely Scaled Silicon Nano-CMOS Devices”, PROCEEDINGS OF THE IEEE, VOL.91, NO.11, Novembre 2003.
[2] Digh Hisamoto, Wen-Chin Lee, ed atri, “FinFET –A Self –Aligned Double-Gate MOSFET Scalable to 20nm”, IEEE Transactions On Electron Devices, VOL.47, NO. 12 , Dicembre 2000.
[3] Edward J. Nowak, Ingo Aller, ed altri, “Turning Silicon on its edge”, IEEE Circuit & Devices Magazine, Gennaio/Febbraio 2004.
[4] Jan De Blauwe, “Nanocrystal Nonvolatile Memory Devices”, IEEE Transactions on nanotechnology, VOL.1, NO.1, Marzo 2002.
[5] Roberto Bez, Emilio Camerlenghi, ed altri, ”Introduction to Flash memory”, PROCEEDINGS OF THE IEEE,VOL.91, NO. 4, Aprile 2003.
[6] F. Hofmann, M. She, ed altri, “NVM based on FinFET device structures”, Solid State Electronics, VOL. 49, pp.1799-1804, 2005.
[7] Chin-Yuan Lu, Tao-Cheng, ed altri, “Non-Volatile Memory Technology- Today and Tomorrow”, PROCEEDINGS OF 13th IPFA 2006, Singapore.
[8] Sixth Framework Programe, Finflash Project, Marzo 2005.
[9] H.S.P.Wong, “Beyond the conventional transistor”, IBM J. RES & DEV, VOL.46, NO 2/3, Marzo-Maggio 2002.
[10] Xin Ben Gu ,Ten-Lon Chen, G,Gildenblat,ed altri, “ A surface potential-based compact model of n-MOSFET gate tunneling current”, Electron Devices,VOL. 51, NO.1, Gennaio 2004.
[11] G. Gildenblat, Xin Li, ed altri, “ PSP: an advanced surface-potential-based MOSFET model for circuit simulation”, Electron Devices, VOL. 53, NO.9, Settembre 2006.
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[13] Silvaco, ATLAS User’s Manual.
[14] Moon Kyung Kim, S.D. Chae, ed altri, “ Ultrashort SONOS Memories”, IEEE Transactions on Nanotechnology, VOL.3, NO, 4, Dicembre 2004.
[15] B. De Salvo, C. Geradi,” Performance and Reliability Features of Advanced Nonvolatile Memories Based on Discrete Traps (Silicon Nanocrystals, SONOS), IEEE Transactions on Devices and Materials Reliability, VOL.4, NO. 3, Settembre 2004.
[16] G.Ghione, “Dispositivi per la microelettronica”, McGraw-Hill Libri Italia s.r.l.
[17] B.W. Kernigham, D. M. Ritchie, “Linguaggio C”, Jackson libri s.r.l 1989.
[18] P. Cappelletti, ed altri, “Flash Memories”, Kluver Academic Publishers.
[19] B. De Salvo, G. Ghibaudo, ed altri, “Expertimental and Theoretical Investigation of Nano-Crystal and Nitride-Trap Memory Devices”,IEEE Transactions on Electron Devices,VOL.48, NO.
8, Agosto 2001.
[20] Boaz Eitan, P. Pavan, ed altri, “Can NROM, a 2-bit, Trapping Storage NVM Cell, Give a Real Challenge to Floating Gate Cells ?”, Presented at the International Conference on Solid State Devices and Materials, Tokyo, 1999.
[21] Rahman M., “Design and Fabrication of Tri-Gate FinFET”, 22nd Annual Microelectronic Engineering Conference, Maggio 2004.
[22] Gen Pei, Jakub Kedzirski, ed altri, “FinFET Design Consideration Based on 3-D Simulation and Analytical Modeling”, IEEE Transactions on Electron Devices, VOL. 49, NO. 8 Agosto 2002
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