REAL-TIME PATTERN MATCHING SYSTEM FOR THE FTK PROCESSOR AT ATLAS EXPERIMENT

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List of Figures and references

1.1 LHC underground ring with the ATLAS, CMS, LHCb and ALICE experiments.

https://www.swissinfo.ch/eng/sci-tech/the-big-bang-machine-is-back_what-s-next-for-cern-s-large-hadron-collider-/41337172

1.2 ATLAS Layout, main parts are listed

https://cds.cern.ch/record/841458

1.3 Picture of the ATLAS toroid

https://www.google.it/url?sa=t&rct=j&q=&esrc=s&source=web&cd=7&cad=rja&uact=8&ved=0ahUKEwjG5tPArOjVAhWHshQKHcm

rB8AQFghLMAY&url=https%3A%2F%2Fphys.org%2Fnews%2F2008-09-fourth-dimension.html&usg=AFQjCNHl44Gf59a2X1c0Jtbi77oxMsiwGw

1.4 Representation of one track (red line) that cross all the elements of the

central tracker system: The silicon Pixel, The silicon SCT and the TRT.

The ATLAS Collaboration, “Track Reconstruction Performance of the ATLAS Inner Detector at ps = 13 TeV,” Tech. Rep. ATL-PHYS-PUB-2015-018, CERN, Geneva, Jul 2015.

1.4 Schematic view of a silicon sensor

http://etd.adm.unipi.it/theses/available/etd-01162013-170923/

1.6 Schematic view of the calorimeters of the ATLAS experiment [2]

https://kjende.web.cern.ch/kjende/en/atlas.htm

1.7 Flow diagram of the ATLAS Trigger and data acquisition system

https://link.springer.com/article/10.1140/epjc/s10052-017-4852-3

1.8 Two zoomed bunch crossing: a) 25 proton-proton interactions (top); b)

78 proton-proton interactions (bottom)

https://indico.cern.ch/event/306155/

1.9 Efficiency of FTK tracks on left and fake tracks on right with respect to

offline tracks as a function of pT, in black 46 pile-up events, and in red

open circles 69 pile-up events.

M. Shochet, L. Tompkins, V. Cavaliere, P. Giannetti, A. Annovi, and G. Volpi, “Fast TracKer (FTK) Technical Design Report,” Tech. Rep. CERN-LHCC-2013-007. ATLAS-TDR-021, Jun 2013. ATLAS Fast Tracker Technical Design Report.

2.3 Abstracted representation of the connections inside the Data Formatter

System. FPGAs are the green dots. Different kinds of connection

are shown: between FPGAs in-board (pink), between boards (blue) and

intra-crate (orange).

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http://atlasftk.uchicago.edu/photos/

2.6 Picture of the Auxiliary card (AUX).

http://atlasftk.uchicago.edu/photos/

2.9 Picture of the Second Stage Board with the Rear Transition Module

M. Shochet, L. Tompkins, V. Cavaliere, P. Giannetti, A. Annovi, and G. Volpi, “Fast TracKer (FTK) Technical Design Report,” Tech. Rep. CERN-LHCC-2013-007. ATLAS-TDR-021, Jun 2013. ATLAS Fast Tracker Technical Design Report

.

2.10 Picture of the FTK to Level-2 Interface Core.

3.1 Architecture of the Associative Memory chip.

S. Citraro, A. Annovi, N. Biesuz, P. Giannetti, P. Luciano, H. Nasimi, M. Piendibene, C. L. Sotiropoulou, and G. Volpi, “Highly parallelized pattern matching hardware for fast tracking at hadron colliders,” IEEE Transactions on Nuclear Science, vol. 63, pp. 1147–1154, April 2016

.

3.3 In the left part of the figure the schematic of the XOR-based single bit

CAM cell is shown (a). In the right side (b) the schematic of the 18-bit

logic gate is shown.

The Associative Memory Serial Link Processor for the Fast TracKer (FTK) at ATLAS A. Andreani,a,b A. Annovi,c,2 R. Beccherle,d,e M. Beretta,c N. Biesuz,f,3 W. Billereau,g R. Cipriani,e, f S. Citraro,e, f M. Citterio,a A. Colombo,b J.M. Combe,g F. Crescioli,d D. Dimas,h S. Donati,e, f C. Gentsos,i P. Giannetti,e K. Kordas,i A. Lanza,j V. Liberali,a,b,1 P. Luciano,e, f D. Magalotti,k,l P. Neroutsos,i S. Nikolaidis,i M. Piendibene,e, f E. Rossi,f,4 A. Sakellariou,h S. Shojaii,a,b C.-L. Sotiropoulou,i A. Stabilea and P. Vulliezg

3.4 Schematic concept of a block of the "Fisher tree" that allows to going

back through the gate.

P. Fischer, “First implementation of the {MEPHISTO} binary readout architecture for strip detectors,” Nu- clear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, vol. 461, no. 1-3, pp. 499 – 504, 2001. 8th Pisa Meeting on Advanced Detectors.

3.5 Schematic representation of the Little Associative Memory Board (LAMB)

(daughter-board), in the left figure (a) the input distribution is shown; the

right figure (b) shows the output data path.

.

3.14 Correlation plot between output processing times and number of matched

roads.

H. Nasimi, “The fast tracker trigger upgradefor the atlas experiment,high rate trigger algorithms,”

3.15 Correlation plot between output processing times and position of matched

roads in the readout-tree.

H. Nasimi, “The fast tracker trigger upgradefor the atlas experiment,high rate trigger algorithms,”

3.16 Serial data link analysis.

.

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4.1 A sketch of the 9U VME core crate. There are 16 Processing Units, four

Second Stage Boards and one CPU.

Annovi, A., Ancu, L.S., Beccherle, R., Bertolucci, F., Biesuz, N., Citraro,S., ...& Volpi, G. The Associative Memory System Infrastructures for the ATLAS FastTracker. IEEE Transactions on Nuclear Science.

4.2 (a) Lateral view of the rack with the custom CAEN power supply placed

in the middle of two bins; (b) top view of CAEN power supply. The

upper side of (b) (indicated by the red arrow) is the front of the bin

(rotated 90

◦

clockwise).

4.3 (a) The proposed rack layout; (b) the installation at USA15 of the upper

section of the rack.

4.4 (a) Contour plot of flow intensity in a central section of the crate. Three

fans are visible in the bottom of the image. (b) Detail of the air flow

above the DC-DC converters.

4.5 New DC-DC placement which does not obstruct the air flow on the upper

AM-chips.

4.6 AMB final design. The DC-DC converters are marked in white rectangles.

Two of them are aligned with the LAMB central connectors (white

arrow).

4.7 Temperatures measured in each one of the central slots of the bin for the

Front Lateral sensor of the type-1and type-2 boards, always positioned

in the middle of the four AMB-Slim packet.

4.8 Comparison of temperatures measured with a single and a double fan

tray in the most critical points of the type-1board (Front Lateral and

Front Central sensors placed at the board top) at the center of the four

AMB-Slim packet.

5.1 A natural image (a) and corresponding filtered images(b,c).

Information and Perception of Meaningful Patterns Maria M. Del Viva , Giovanni Punzi, Daniele Benedetti Published: July 19, 2013https://doi.org/10.1371/journal.pone.0069154

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